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Side by Side Diff: gcc/unwind-pnacl.h

Issue 23629051: ARM EH: Extend DWARF_FRAME_REGISTERS count to 48 and map reg# 256 -> 16. (Closed) Base URL: http://git.chromium.org/native_client/pnacl-gcc.git@pnacl
Patch Set: typos Created 7 years, 3 months ago
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1 #ifndef UNWIND_PNACL_H 1 #ifndef UNWIND_PNACL_H
2 #define UNWIND_PNACL_H 2 #define UNWIND_PNACL_H
3 3
4 #define STACK_GROWS_DOWNWARD 1 4 #define STACK_GROWS_DOWNWARD 1
5 5
6 /* Define: __builtin_dwarf_sp_column */ 6 /* Define: __builtin_dwarf_sp_column */
7 #if defined(__x86_64__) 7 #if defined(__x86_64__)
8 #define __builtin_dwarf_sp_column() 7 8 #define __builtin_dwarf_sp_column() 7
9 #elif defined(__i386__) 9 #elif defined(__i386__)
10 #define __builtin_dwarf_sp_column() 4 10 #define __builtin_dwarf_sp_column() 4
11 #elif defined(__arm__) 11 #elif defined(__arm__)
12 #define __builtin_dwarf_sp_column() 13 12 #define __builtin_dwarf_sp_column() 13
13 #elif defined(__mips__) 13 #elif defined(__mips__)
14 #define __builtin_dwarf_sp_column() 29 14 #define __builtin_dwarf_sp_column() 29
15 #else 15 #else
16 #error "Unknown platform" 16 #error "Unknown platform"
17 #endif 17 #endif
18 18
19 /* Define: DWARF_FRAME_REGISTERS */ 19 /* Define: DWARF_FRAME_REGISTERS */
20 #ifdef DWARF_FRAME_REGISTERS 20 #ifdef DWARF_FRAME_REGISTERS
21 #undef DWARF_FRAME_REGISTERS 21 #undef DWARF_FRAME_REGISTERS
22 #endif 22 #endif
23 23
24 #if defined(__x86_64__) || defined(__i386__) 24 #if defined(__x86_64__) || defined(__i386__)
25 #define DWARF_FRAME_REGISTERS 17 25 #define DWARF_FRAME_REGISTERS 17
26 #elif defined(__arm__) 26 #elif defined(__arm__)
27 #define DWARF_FRAME_REGISTERS 16 27 /*
28 * r0-15, and map 256-287 for d0-d31 into regno 16 -> 48.
29 * See:
30 *http://infocenter.arm.com/help/topic/com.arm.doc.ihi0040b/IHI0040B_aadwarf.pdf
31 */
32 #define DWARF_FRAME_REGISTERS 48
28 #elif defined(__mips__) 33 #elif defined(__mips__)
29 /* 34 /*
30 * Number of hardware registers we use in PNaCl. We have: 35 * Number of hardware registers we use in PNaCl. We have:
31 * 36 *
32 * - 32 integer registers 37 * - 32 integer registers
33 * - 32 floating point registers 38 * - 32 floating point registers
34 * - 8 condition code registers 39 * - 8 condition code registers
35 * - 2 accumulator registers (hi and lo) 40 * - 2 accumulator registers (hi and lo)
36 */ 41 */
37 #define DWARF_FRAME_REGISTERS 74 42 #define DWARF_FRAME_REGISTERS 74
(...skipping 16 matching lines...) Expand all
54 switch back to using LLVM if these were fixed. 59 switch back to using LLVM if these were fixed.
55 60
56 It might be better to switch to using libunwind instead of libgcc_eh 61 It might be better to switch to using libunwind instead of libgcc_eh
57 (see https://code.google.com/p/nativeclient/issues/detail?id=2749). */ 62 (see https://code.google.com/p/nativeclient/issues/detail?id=2749). */
58 63
59 #if defined(__i386__) || defined(__x86_64__) 64 #if defined(__i386__) || defined(__x86_64__)
60 /* Assume we are compiling with GCC, which provides a working 65 /* Assume we are compiling with GCC, which provides a working
61 definition of __builtin_init_dwarf_reg_size_table(). */ 66 definition of __builtin_init_dwarf_reg_size_table(). */
62 67
63 #elif defined(__arm__) 68 #elif defined(__arm__)
64 /* All regs are 32bit = 4 bytes */ 69 #define __builtin_init_dwarf_reg_size_table(table) do { \
65 #define __builtin_init_dwarf_reg_size_table(table) do { \ 70 int i; \
66 int i; \ 71 /* Integer registers are 32bit. */ \
67 for (i = 0; i < DWARF_FRAME_REGISTERS; ++i) \ 72 for (i = 0; i < 16; ++i) \
68 table[i] = 4; \ 73 table[i] = 4; \
74 /* The rest are VFPv3/NEON (64bit). */ \
75 for (i = 16; i < DWARF_FRAME_REGISTERS; ++i) \
76 table[i] = 8; \
69 } while (0) 77 } while (0)
70 78
71 #elif defined(__mips__) 79 #elif defined(__mips__)
72 /* All regs are 32bit = 4 bytes */ 80 /* All regs are 32bit = 4 bytes */
73 #define __builtin_init_dwarf_reg_size_table(table) do { \ 81 #define __builtin_init_dwarf_reg_size_table(table) do { \
74 int i; \ 82 int i; \
75 for (i = 0; i < DWARF_FRAME_REGISTERS; ++i) \ 83 for (i = 0; i < DWARF_FRAME_REGISTERS; ++i) \
76 table[i] = 4; \ 84 table[i] = 4; \
77 } while (0) 85 } while (0)
78 86
(...skipping 21 matching lines...) Expand all
100 #define pnacl_unwind_result1_reg() 2 108 #define pnacl_unwind_result1_reg() 2
101 #elif defined(__arm__) 109 #elif defined(__arm__)
102 #define pnacl_unwind_result1_reg() 5 110 #define pnacl_unwind_result1_reg() 5
103 #elif defined(__mips__) 111 #elif defined(__mips__)
104 #define pnacl_unwind_result1_reg() 5 112 #define pnacl_unwind_result1_reg() 5
105 #else 113 #else
106 #error "unknown platform" 114 #error "unknown platform"
107 #endif 115 #endif
108 116
109 #endif /* UNWIND_PNACL_H */ 117 #endif /* UNWIND_PNACL_H */
110
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