| Index: src/compiler/arm/instruction-selector-arm.cc
|
| diff --git a/src/compiler/arm/instruction-selector-arm.cc b/src/compiler/arm/instruction-selector-arm.cc
|
| index 3975e1c1a0f268810bdc5dd0d41af8e686712e82..ceb5b2507f809d912dd4268a3937462274428786 100644
|
| --- a/src/compiler/arm/instruction-selector-arm.cc
|
| +++ b/src/compiler/arm/instruction-selector-arm.cc
|
| @@ -1513,46 +1513,55 @@ void InstructionSelector::VisitFloat64Sqrt(Node* node) {
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|
|
|
|
| void InstructionSelector::VisitFloat32RoundDown(Node* node) {
|
| + DCHECK(CpuFeatures::IsSupported(ARMv8));
|
| VisitRR(this, kArmVrintmF32, node);
|
| }
|
|
|
|
|
| void InstructionSelector::VisitFloat64RoundDown(Node* node) {
|
| + DCHECK(CpuFeatures::IsSupported(ARMv8));
|
| VisitRR(this, kArmVrintmF64, node);
|
| }
|
|
|
|
|
| void InstructionSelector::VisitFloat32RoundUp(Node* node) {
|
| + DCHECK(CpuFeatures::IsSupported(ARMv8));
|
| VisitRR(this, kArmVrintpF32, node);
|
| }
|
|
|
|
|
| void InstructionSelector::VisitFloat64RoundUp(Node* node) {
|
| + DCHECK(CpuFeatures::IsSupported(ARMv8));
|
| VisitRR(this, kArmVrintpF64, node);
|
| }
|
|
|
|
|
| void InstructionSelector::VisitFloat32RoundTruncate(Node* node) {
|
| + DCHECK(CpuFeatures::IsSupported(ARMv8));
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| VisitRR(this, kArmVrintzF32, node);
|
| }
|
|
|
|
|
| void InstructionSelector::VisitFloat64RoundTruncate(Node* node) {
|
| + DCHECK(CpuFeatures::IsSupported(ARMv8));
|
| VisitRR(this, kArmVrintzF64, node);
|
| }
|
|
|
|
|
| void InstructionSelector::VisitFloat64RoundTiesAway(Node* node) {
|
| + DCHECK(CpuFeatures::IsSupported(ARMv8));
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| VisitRR(this, kArmVrintaF64, node);
|
| }
|
|
|
|
|
| void InstructionSelector::VisitFloat32RoundTiesEven(Node* node) {
|
| + DCHECK(CpuFeatures::IsSupported(ARMv8));
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| VisitRR(this, kArmVrintnF32, node);
|
| }
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|
|
|
|
| void InstructionSelector::VisitFloat64RoundTiesEven(Node* node) {
|
| + DCHECK(CpuFeatures::IsSupported(ARMv8));
|
| VisitRR(this, kArmVrintnF64, node);
|
| }
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|
|
|
|