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1 // Copyright 2012 the V8 project authors. All rights reserved. | 1 // Copyright 2012 the V8 project authors. All rights reserved. |
2 // Redistribution and use in source and binary forms, with or without | 2 // Redistribution and use in source and binary forms, with or without |
3 // modification, are permitted provided that the following conditions are | 3 // modification, are permitted provided that the following conditions are |
4 // met: | 4 // met: |
5 // | 5 // |
6 // * Redistributions of source code must retain the above copyright | 6 // * Redistributions of source code must retain the above copyright |
7 // notice, this list of conditions and the following disclaimer. | 7 // notice, this list of conditions and the following disclaimer. |
8 // * Redistributions in binary form must reproduce the above | 8 // * Redistributions in binary form must reproduce the above |
9 // copyright notice, this list of conditions and the following | 9 // copyright notice, this list of conditions and the following |
10 // disclaimer in the documentation and/or other materials provided | 10 // disclaimer in the documentation and/or other materials provided |
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726 // If needed, restore wanted bits of FPSCR. | 726 // If needed, restore wanted bits of FPSCR. |
727 Label fpscr_done; | 727 Label fpscr_done; |
728 vmrs(scratch); | 728 vmrs(scratch); |
729 tst(scratch, Operand(kVFPDefaultNaNModeControlBit)); | 729 tst(scratch, Operand(kVFPDefaultNaNModeControlBit)); |
730 b(ne, &fpscr_done); | 730 b(ne, &fpscr_done); |
731 orr(scratch, scratch, Operand(kVFPDefaultNaNModeControlBit)); | 731 orr(scratch, scratch, Operand(kVFPDefaultNaNModeControlBit)); |
732 vmsr(scratch); | 732 vmsr(scratch); |
733 bind(&fpscr_done); | 733 bind(&fpscr_done); |
734 } | 734 } |
735 | 735 |
736 void MacroAssembler::VFPCanonicalizeNaN(const DwVfpRegister value, | 736 |
| 737 void MacroAssembler::VFPCanonicalizeNaN(const DwVfpRegister dst, |
| 738 const DwVfpRegister src, |
737 const Condition cond) { | 739 const Condition cond) { |
738 vsub(value, value, kDoubleRegZero, cond); | 740 vsub(dst, src, kDoubleRegZero, cond); |
739 } | 741 } |
740 | 742 |
741 | 743 |
742 void MacroAssembler::VFPCompareAndSetFlags(const DwVfpRegister src1, | 744 void MacroAssembler::VFPCompareAndSetFlags(const DwVfpRegister src1, |
743 const DwVfpRegister src2, | 745 const DwVfpRegister src2, |
744 const Condition cond) { | 746 const Condition cond) { |
745 // Compare and move FPSCR flags to the normal condition flags. | 747 // Compare and move FPSCR flags to the normal condition flags. |
746 VFPCompareAndLoadFlags(src1, src2, pc, cond); | 748 VFPCompareAndLoadFlags(src1, src2, pc, cond); |
747 } | 749 } |
748 | 750 |
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3884 void CodePatcher::EmitCondition(Condition cond) { | 3886 void CodePatcher::EmitCondition(Condition cond) { |
3885 Instr instr = Assembler::instr_at(masm_.pc_); | 3887 Instr instr = Assembler::instr_at(masm_.pc_); |
3886 instr = (instr & ~kCondMask) | cond; | 3888 instr = (instr & ~kCondMask) | cond; |
3887 masm_.emit(instr); | 3889 masm_.emit(instr); |
3888 } | 3890 } |
3889 | 3891 |
3890 | 3892 |
3891 } } // namespace v8::internal | 3893 } } // namespace v8::internal |
3892 | 3894 |
3893 #endif // V8_TARGET_ARCH_ARM | 3895 #endif // V8_TARGET_ARCH_ARM |
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