MIPS: Fix compilation failures due to warnings on mips32r1

test/unittests/compiler/mips/instruction-selector-mips-unittest.cc

 // Copyright 2014 the V8 project authors. All rights reserved.
 // Use of this source code is governed by a BSD-style license that can be
 // found in the LICENSE file
 
 #include "test/unittests/compiler/instruction-selector-unittest.h"
 
 namespace v8 {
 namespace internal {
 namespace compiler {
 
@@ skipping 1162 matching lines @@
   Stream s = m.Build();
   ASSERT_EQ(1U, s.size());
   EXPECT_EQ(kMipsAbsD, s[0]->arch_opcode());
   ASSERT_EQ(1U, s[0]->InputCount());
   EXPECT_EQ(s.ToVreg(p0), s.ToVreg(s[0]->InputAt(0)));
   ASSERT_EQ(1U, s[0]->OutputCount());
   EXPECT_EQ(s.ToVreg(n), s.ToVreg(s[0]->Output()));
 }
 
 TEST_F(InstructionSelectorTest, Float32AddWithFloat32Mul) {
+  if (!IsMipsArchVariant(kMips32r2) && !IsMipsArchVariant(kMips32r6)) {
+    return;
+  }
   {
     StreamBuilder m(this, MachineType::Float32(), MachineType::Float32(),
                     MachineType::Float32(), MachineType::Float32());
     Node* const p0 = m.Parameter(0);
     Node* const p1 = m.Parameter(1);
     Node* const p2 = m.Parameter(2);
     Node* const n = m.Float32Add(m.Float32Mul(p0, p1), p2);
     m.Return(n);
     Stream s = m.Build();
     ASSERT_EQ(1U, s.size());
@@ skipping 43 matching lines @@
     } else if (IsMipsArchVariant(kMips32r6)) {
       EXPECT_TRUE(
           UnallocatedOperand::cast(s[0]->Output())->HasSameAsInputPolicy());
     }
     EXPECT_EQ(s.ToVreg(n), s.ToVreg(s[0]->Output()));
     EXPECT_EQ(kFlags_none, s[0]->flags_mode());
   }
 }
 
 TEST_F(InstructionSelectorTest, Float64AddWithFloat64Mul) {
+  if (!IsMipsArchVariant(kMips32r2) && !IsMipsArchVariant(kMips32r6)) {
+    return;
+  }
   {
     StreamBuilder m(this, MachineType::Float64(), MachineType::Float64(),
                     MachineType::Float64(), MachineType::Float64());
     Node* const p0 = m.Parameter(0);
     Node* const p1 = m.Parameter(1);
     Node* const p2 = m.Parameter(2);
     Node* const n = m.Float64Add(m.Float64Mul(p0, p1), p2);
     m.Return(n);
     Stream s = m.Build();
     ASSERT_EQ(1U, s.size());
@@ skipping 48 matching lines @@
     EXPECT_EQ(kFlags_none, s[0]->flags_mode());
   }
 }
 
 TEST_F(InstructionSelectorTest, Float32SubWithFloat32Mul) {
   StreamBuilder m(this, MachineType::Float32(), MachineType::Float32(),
                   MachineType::Float32(), MachineType::Float32());
   Node* const p0 = m.Parameter(0);
   Node* const p1 = m.Parameter(1);
   Node* const p2 = m.Parameter(2);
-  Node* n;
+  Node* n = nullptr;
+
+  if (!IsMipsArchVariant(kMips32r2) && !IsMipsArchVariant(kMips32r6)) {
+    return;
+  }
+
   if (IsMipsArchVariant(kMips32r2)) {
     n = m.Float32Sub(m.Float32Mul(p1, p2), p0);
   } else if (IsMipsArchVariant(kMips32r6)) {
     n = m.Float32Sub(p0, m.Float32Mul(p1, p2));
   }
   m.Return(n);
   Stream s = m.Build();
   ASSERT_EQ(1U, s.size());
   if (IsMipsArchVariant(kMips32r2)) {
     EXPECT_EQ(kMipsMsubS, s[0]->arch_opcode());
@@ skipping 15 matching lines @@
   EXPECT_EQ(s.ToVreg(n), s.ToVreg(s[0]->Output()));
   EXPECT_EQ(kFlags_none, s[0]->flags_mode());
 }
 
 TEST_F(InstructionSelectorTest, Float64SubWithFloat64Mul) {
   StreamBuilder m(this, MachineType::Float64(), MachineType::Float64(),
                   MachineType::Float64(), MachineType::Float64());
   Node* const p0 = m.Parameter(0);
   Node* const p1 = m.Parameter(1);
   Node* const p2 = m.Parameter(2);
-  Node* n;
+  Node* n = nullptr;
+
+  if (!IsMipsArchVariant(kMips32r2) && !IsMipsArchVariant(kMips32r6)) {
+    return;
+  }
+
   if (IsMipsArchVariant(kMips32r2)) {
     n = m.Float64Sub(m.Float64Mul(p1, p2), p0);
   } else if (IsMipsArchVariant(kMips32r6)) {
     n = m.Float64Sub(p0, m.Float64Mul(p1, p2));
   }
   m.Return(n);
   Stream s = m.Build();
   ASSERT_EQ(1U, s.size());
   if (IsMipsArchVariant(kMips32r2)) {
     EXPECT_EQ(kMipsMsubD, s[0]->arch_opcode());
@@ skipping 43 matching lines @@
   ASSERT_EQ(1U, s.size());
   EXPECT_EQ(kMipsFloat64Min, s[0]->arch_opcode());
   ASSERT_EQ(2U, s[0]->InputCount());
   ASSERT_EQ(1U, s[0]->OutputCount());
   EXPECT_EQ(s.ToVreg(n), s.ToVreg(s[0]->Output()));
 }
 
 }  // namespace compiler
 }  // namespace internal
 }  // namespace v8