[Subzero][MIPS32] Implements 64-bit shl, lshr, ashr for MIPS

src/IceInstMIPS32.h

 //===- subzero/src/IceInstMIPS32.h - MIPS32 machine instrs --*- C++ -*-----===//
 //
 //                        The Subzero Code Generator
 //
 // This file is distributed under the University of Illinois Open Source
 // License. See LICENSE.TXT for details.
 //
 //===----------------------------------------------------------------------===//
 ///
 /// \file
@@ skipping 1017 matching lines @@
     dumpSources(Func);
   }
   static bool classof(const Inst *Inst) { return isClassof(Inst, K); }
 
 private:
   InstMIPS32MovConditional(Cfg *Func, Variable *Dest, Variable *Src,
                            Operand *FCC)
       : InstMIPS32(Func, K, 2, Dest) {
     addSource(Src);
     addSource(FCC);
+    setDestRedefined();

[Jim Stichnoth, 2016/09/21 17:08:20]

See my comment in
https://codereview.chromium.org/2357143002/diff/1/src/IceTargetLoweringMIPS32.h

[sagar.thakur, 2016/09/22 14:43:50]

Done.

   }
 
   static const char *Opcode;
 };
 
 using InstMIPS32Abs_d = InstMIPS32TwoAddrFPR<InstMIPS32::Abs_d>;
 using InstMIPS32Abs_s = InstMIPS32TwoAddrFPR<InstMIPS32::Abs_s>;
 using InstMIPS32Add = InstMIPS32ThreeAddrGPR<InstMIPS32::Add>;
 using InstMIPS32Add_d = InstMIPS32ThreeAddrFPR<InstMIPS32::Add_d>;
 using InstMIPS32Add_s = InstMIPS32ThreeAddrFPR<InstMIPS32::Add_s>;
@@ skipping 29 matching lines @@
 using InstMIPS32Ldc1 = InstMIPS32Load<InstMIPS32::Ldc1>;
 using InstMIPS32Lui = InstMIPS32UnaryopGPR<InstMIPS32::Lui>;
 using InstMIPS32Lw = InstMIPS32Load<InstMIPS32::Lw>;
 using InstMIPS32Lwc1 = InstMIPS32Load<InstMIPS32::Lwc1>;
 using InstMIPS32Mfc1 = InstMIPS32TwoAddrGPR<InstMIPS32::Mfc1>;
 using InstMIPS32Mfhi = InstMIPS32UnaryopGPR<InstMIPS32::Mfhi>;
 using InstMIPS32Mflo = InstMIPS32UnaryopGPR<InstMIPS32::Mflo>;
 using InstMIPS32Mov_d = InstMIPS32TwoAddrFPR<InstMIPS32::Mov_d>;
 using InstMIPS32Mov_s = InstMIPS32TwoAddrFPR<InstMIPS32::Mov_s>;
 using InstMIPS32Movf = InstMIPS32MovConditional<InstMIPS32::Movf>;
-using InstMIPS32Movn = InstMIPS32ThreeAddrGPR<InstMIPS32::Movn>;
+using InstMIPS32Movn = InstMIPS32MovConditional<InstMIPS32::Movn>;

[obucinac, 2016/09/21 12:47:49]

Why is this changed? MovConditional is used by FP movs which are using Floating
Point Condtion Codes for decision. MOVN and MOVZ are using value from GPR for
decision.

[Jim Stichnoth, 2016/09/23 14:10:37]

Is there an answer for this question?  (I'm not familiar enough to weight in.)

[obucinac, 2016/09/23 15:59:45]

The main difference  is that MovConditional has no Dest, and ThreeAddrGPR has. I
am concerned that this change may affect propper liveness analisys.

[Jim Stichnoth, 2016/09/23 18:49:11]

I've looked through this more carefully.  I think the original code is wrong and
the proposed change is correct.

If I understand correctly:
  movn A, B, C
sets A to either A or B, based on the value of C.  In this case, it is correct
to have A as both the dest and one of the src operands, and this is what
InstMIPS32MovConditional does.

On the other hand, if the instruction were to set A based on just B and C, and
completely ignored the old value in A, then ThreeAddrGPR would be more
appropriate.

 using InstMIPS32Movn_d = InstMIPS32ThreeAddrGPR<InstMIPS32::Movn_d>;
 using InstMIPS32Movn_s = InstMIPS32ThreeAddrGPR<InstMIPS32::Movn_s>;
 using InstMIPS32Movt = InstMIPS32MovConditional<InstMIPS32::Movt>;
 using InstMIPS32Movz = InstMIPS32ThreeAddrGPR<InstMIPS32::Movz>;
 using InstMIPS32Movz_d = InstMIPS32ThreeAddrGPR<InstMIPS32::Movz_d>;
 using InstMIPS32Movz_s = InstMIPS32ThreeAddrGPR<InstMIPS32::Movz_s>;
 using InstMIPS32Mtc1 = InstMIPS32TwoAddrGPR<InstMIPS32::Mtc1>;
 using InstMIPS32Mthi = InstMIPS32UnaryopGPR<InstMIPS32::Mthi>;
 using InstMIPS32Mtlo = InstMIPS32UnaryopGPR<InstMIPS32::Mtlo>;
 using InstMIPS32Mul = InstMIPS32ThreeAddrGPR<InstMIPS32::Mul>;
@@ skipping 96 matching lines @@
 template <> void InstMIPS32Addu::emitIAS(const Cfg *Func) const;
 template <> void InstMIPS32Slt::emitIAS(const Cfg *Func) const;
 template <> void InstMIPS32Sltu::emitIAS(const Cfg *Func) const;
 template <> void InstMIPS32Sw::emitIAS(const Cfg *Func) const;
 template <> void InstMIPS32Lw::emitIAS(const Cfg *Func) const;
 
 } // end of namespace MIPS32
 } // end of namespace Ice
 
 #endif // SUBZERO_SRC_ICEINSTMIPS32_H