tests_lit/llvm2ice_tests/nacl-other-intrinsics.ll - Issue 2358393004: Subzero, MIPS32: Intrinsic call Cttz for i32

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Issue 2358393004: Subzero, MIPS32: Intrinsic call Cttz for i32 (Closed) Base URL: https://chromium.googlesource.com/native_client/pnacl-subzero.git@master

Patch Set: Changes as advised Created 4 years, 2 months ago

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1 ; This tests the NaCl intrinsics not related to atomic operations.	1 ; This tests the NaCl intrinsics not related to atomic operations.

2	2

3 ; RUN: %if --need=target_X8632 --command %p2i --filetype=obj --disassemble \	3 ; RUN: %if --need=target_X8632 --command %p2i --filetype=obj --disassemble \

4 ; RUN: --target x8632 --sandbox -i %s --args -O2 \	4 ; RUN: --target x8632 --sandbox -i %s --args -O2 \

5 ; RUN: -allow-externally-defined-symbols \	5 ; RUN: -allow-externally-defined-symbols \

6 ; RUN: \| %if --need=target_X8632 --command FileCheck %s	6 ; RUN: \| %if --need=target_X8632 --command FileCheck %s

7 ; RUN: %if --need=target_X8632 --command %p2i --filetype=obj --disassemble \	7 ; RUN: %if --need=target_X8632 --command %p2i --filetype=obj --disassemble \

8 ; RUN: --target x8632 --sandbox -i %s --args -Om1 \	8 ; RUN: --target x8632 --sandbox -i %s --args -Om1 \

9 ; RUN: -allow-externally-defined-symbols \	9 ; RUN: -allow-externally-defined-symbols \

10 ; RUN: \| %if --need=target_X8632 --command FileCheck %s	10 ; RUN: \| %if --need=target_X8632 --command FileCheck %s

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477 %r = call i32 @llvm.cttz.i32(i32 %x, i1 false)	477 %r = call i32 @llvm.cttz.i32(i32 %x, i1 false)

478 ret i32 %r	478 ret i32 %r

479 }	479 }

480 ; CHECK-LABEL: test_cttz_32	480 ; CHECK-LABEL: test_cttz_32

481 ; CHECK: bsf [[REG_IF_NOTZERO:e.]],{{.}}	481 ; CHECK: bsf [[REG_IF_NOTZERO:e.]],{{.}}

482 ; CHECK: mov [[REG_IF_ZERO:e.*]],0x20	482 ; CHECK: mov [[REG_IF_ZERO:e.*]],0x20

483 ; CHECK: cmovne [[REG_IF_ZERO]],[[REG_IF_NOTZERO]]	483 ; CHECK: cmovne [[REG_IF_ZERO]],[[REG_IF_NOTZERO]]

484 ; ARM32-LABEL: test_cttz_32	484 ; ARM32-LABEL: test_cttz_32

485 ; ARM32: rbit	485 ; ARM32: rbit

486 ; ARM32: clz	486 ; ARM32: clz

	487 ; MIPS32-LABEL: test_cttz_32

	488 ; MIPS32: addiu

	489 ; MIPS32: nor

	490 ; MIPS32: and

	491 ; MIPS32: clz

	492 ; MIPS32: li

	493 ; MIPS32: subu

487	494

488 define internal i64 @test_cttz_64(i64 %x) {	495 define internal i64 @test_cttz_64(i64 %x) {

489 entry:	496 entry:

490 %r = call i64 @llvm.cttz.i64(i64 %x, i1 false)	497 %r = call i64 @llvm.cttz.i64(i64 %x, i1 false)

491 ret i64 %r	498 ret i64 %r

492 }	499 }

493 ; CHECK-LABEL: test_cttz_64	500 ; CHECK-LABEL: test_cttz_64

494 ; CHECK: bsf [[REG_IF_NOTZERO:e.]],{{.}}	501 ; CHECK: bsf [[REG_IF_NOTZERO:e.]],{{.}}

495 ; CHECK: mov [[REG_RES1:e.*]],0x20	502 ; CHECK: mov [[REG_RES1:e.*]],0x20

496 ; CHECK: cmovne [[REG_RES1]],[[REG_IF_NOTZERO]]	503 ; CHECK: cmovne [[REG_RES1]],[[REG_IF_NOTZERO]]

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602 ; CHECK: lea {{.*}},[esp+0x10]	609 ; CHECK: lea {{.*}},[esp+0x10]

603 ; CHECK: lea {{.*}},[esp+0x10]	610 ; CHECK: lea {{.*}},[esp+0x10]

604 ; CHECK: call	611 ; CHECK: call

605 ; CHECK: mov esp,{{.*}}	612 ; CHECK: mov esp,{{.*}}

606 ; CHECK: mov esp,ebp	613 ; CHECK: mov esp,ebp

607 ; ARM32-LABEL: test_stacksave_multiple	614 ; ARM32-LABEL: test_stacksave_multiple

608 ; ARM32: mov {{.*}}, sp	615 ; ARM32: mov {{.*}}, sp

609 ; ARM32: mov {{.*}}, sp	616 ; ARM32: mov {{.*}}, sp

610 ; ARM32: mov {{.*}}, sp	617 ; ARM32: mov {{.*}}, sp

611 ; ARM32: mov sp, {{.*}}	618 ; ARM32: mov sp, {{.*}}

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