Chromium Code Reviews
chromiumcodereview-hr@appspot.gserviceaccount.com (chromiumcodereview-hr) | Please choose your nickname with Settings | Help | Chromium Project | Gerrit Changes | Sign out
(44)

Side by Side Diff: tests_lit/assembler/mips32/encoding_intrinsics.ll

Issue 2358393004: Subzero, MIPS32: Intrinsic call Cttz for i32 (Closed) Base URL: https://chromium.googlesource.com/native_client/pnacl-subzero.git@master
Patch Set: Changes as advised Created 4 years, 2 months ago
Use n/p to move between diff chunks; N/P to move between comments. Draft comments are only viewable by you.
Jump to:
View unified diff | Download patch
« no previous file with comments | « src/IceTargetLoweringMIPS32.cpp ('k') | tests_lit/llvm2ice_tests/nacl-other-intrinsics.ll » ('j') | no next file with comments »
Toggle Intra-line Diffs ('i') | Expand Comments ('e') | Collapse Comments ('c') | Show Comments Hide Comments ('s')
OLDNEW
1 ; Test encoding of MIPS32 instructions used in intrinsic calls 1 ; Test encoding of MIPS32 instructions used in intrinsic calls
2 2
3 ; REQUIRES: allow_dump 3 ; REQUIRES: allow_dump
4 4
5 ; Compile using standalone assembler. 5 ; Compile using standalone assembler.
6 ; RUN: %p2i --filetype=asm -i %s --target=mips32 --args -O2 \ 6 ; RUN: %p2i --filetype=asm -i %s --target=mips32 --args -O2 \
7 ; RUN: --allow-externally-defined-symbols --skip-unimplemented \ 7 ; RUN: --allow-externally-defined-symbols --skip-unimplemented \
8 ; RUN: | FileCheck %s --check-prefix=ASM 8 ; RUN: | FileCheck %s --check-prefix=ASM
9 9
10 ; Show bytes in assembled standalone code. 10 ; Show bytes in assembled standalone code.
11 ; RUN: %p2i --filetype=asm -i %s --target=mips32 --assemble --disassemble \ 11 ; RUN: %p2i --filetype=asm -i %s --target=mips32 --assemble --disassemble \
12 ; RUN: --args -O2 --allow-externally-defined-symbols --skip-unimplemented \ 12 ; RUN: --args -O2 --allow-externally-defined-symbols --skip-unimplemented \
13 ; RUN: | FileCheck %s --check-prefix=DIS 13 ; RUN: | FileCheck %s --check-prefix=DIS
14 14
15 ; Compile using integrated assembler. 15 ; Compile using integrated assembler.
16 ; RUN: %p2i --filetype=iasm -i %s --target=mips32 --args -O2 \ 16 ; RUN: %p2i --filetype=iasm -i %s --target=mips32 --args -O2 \
17 ; RUN: --allow-externally-defined-symbols --skip-unimplemented \ 17 ; RUN: --allow-externally-defined-symbols --skip-unimplemented \
18 ; RUN: | FileCheck %s --check-prefix=IASM 18 ; RUN: | FileCheck %s --check-prefix=IASM
19 19
20 ; Show bytes in assembled integrated code. 20 ; Show bytes in assembled integrated code.
21 ; RUN: %p2i --filetype=iasm -i %s --target=mips32 --assemble --disassemble \ 21 ; RUN: %p2i --filetype=iasm -i %s --target=mips32 --assemble --disassemble \
22 ; RUN: --args -O2 --allow-externally-defined-symbols --skip-unimplemented \ 22 ; RUN: --args -O2 --allow-externally-defined-symbols --skip-unimplemented \
23 ; RUN: | FileCheck %s --check-prefix=DIS 23 ; RUN: | FileCheck %s --check-prefix=DIS
24 24
25 declare i32 @llvm.ctlz.i32(i32, i1) 25 declare i32 @llvm.ctlz.i32(i32, i1)
26 declare i32 @llvm.cttz.i32(i32, i1)
26 declare void @llvm.trap() 27 declare void @llvm.trap()
27 28
28 define internal i32 @encCtlz32(i32 %x) { 29 define internal i32 @encCtlz32(i32 %x) {
29 entry: 30 entry:
30 %r = call i32 @llvm.ctlz.i32(i32 %x, i1 false) 31 %r = call i32 @llvm.ctlz.i32(i32 %x, i1 false)
31 ret i32 %r 32 ret i32 %r
32 } 33 }
33 34
34 ; ASM-LABEL: encCtlz32 35 ; ASM-LABEL: encCtlz32
35 ; ASM-NEXT: .LencCtlz32$entry: 36 ; ASM-NEXT: .LencCtlz32$entry:
(...skipping 14 matching lines...) Expand all
50 ; IASM-NEXT: .byte 0x70 51 ; IASM-NEXT: .byte 0x70
51 ; IASM-NEXT: .byte 0x21 52 ; IASM-NEXT: .byte 0x21
52 ; IASM-NEXT: .byte 0x10 53 ; IASM-NEXT: .byte 0x10
53 ; IASM-NEXT: .byte 0x80 54 ; IASM-NEXT: .byte 0x80
54 ; IASM-NEXT: .byte 0x0 55 ; IASM-NEXT: .byte 0x0
55 ; IASM-NEXT: .byte 0x8 56 ; IASM-NEXT: .byte 0x8
56 ; IASM-NEXT: .byte 0x0 57 ; IASM-NEXT: .byte 0x0
57 ; IASM-NEXT: .byte 0xe0 58 ; IASM-NEXT: .byte 0xe0
58 ; IASM-NEXT: .byte 0x3 59 ; IASM-NEXT: .byte 0x3
59 60
61 define internal i32 @encCttz32(i32 %x) {
62 entry:
63 %r = call i32 @llvm.cttz.i32(i32 %x, i1 false)
64 ret i32 %r
65 }
66
67 ; ASM-LABEL: encCttz32
68 ; ASM-NEXT: .LencCttz32$entry:
69 ; ASM-NEXT: addiu $v0, $a0, -1
70 ; ASM-NEXT: nor $a0, $a0, $zero
71 ; ASM-NEXT: and $a0, $a0, $v0
72 ; ASM-NEXT: clz $a0, $a0
73 ; ASM-NEXT: addiu $v0, $zero, 32
74 ; ASM-NEXT: subu $v0, $v0, $a0
75 ; ASM-NEXT: jr $ra
76
77 ; DIS-LABEL: 00000010 <encCttz32>:
78 ; DIS-NEXT: 10: 2482ffff addiu v0,a0,-1
79 ; DIS-NEXT: 14: 00802027 nor a0,a0,zero
80 ; DIS-NEXT: 18: 00822024 and a0,a0,v0
81 ; DIS-NEXT: 1c: 70842020 clz a0,a0
82 ; DIS-NEXT: 20: 24020020 li v0,32
83 ; DIS-NEXT: 24: 00441023 subu v0,v0,a0
84 ; DIS-NEXT: 28: 03e00008 jr ra
85
86 ; IASM-LABEL: encCttz32
87 ; IASM-NEXT: .LencCttz32$entry:
88 ; IASM-NEXT: .byte 0xff
89 ; IASM-NEXT: .byte 0xff
90 ; IASM-NEXT: .byte 0x82
91 ; IASM-NEXT: .byte 0x24
92 ; IASM-NEXT: .byte 0x27
93 ; IASM-NEXT: .byte 0x20
94 ; IASM-NEXT: .byte 0x80
95 ; IASM-NEXT: .byte 0x0
96 ; IASM-NEXT: .byte 0x24
97 ; IASM-NEXT: .byte 0x20
98 ; IASM-NEXT: .byte 0x82
99 ; IASM-NEXT: .byte 0x0
100 ; IASM-NEXT: .byte 0x20
101 ; IASM-NEXT: .byte 0x20
102 ; IASM-NEXT: .byte 0x84
103 ; IASM-NEXT: .byte 0x70
104 ; IASM-NEXT: .byte 0x20
105 ; IASM-NEXT: .byte 0x0
106 ; IASM-NEXT: .byte 0x2
107 ; IASM-NEXT: .byte 0x24
108 ; IASM-NEXT: .byte 0x23
109 ; IASM-NEXT: .byte 0x10
110 ; IASM-NEXT: .byte 0x44
111 ; IASM-NEXT: .byte 0x0
112 ; IASM-NEXT: .byte 0x8
113 ; IASM-NEXT: .byte 0x0
114 ; IASM-NEXT: .byte 0xe0
115 ; IASM-NEXT: .byte 0x3
116
60 define internal void @encTrap() { 117 define internal void @encTrap() {
61 unreachable 118 unreachable
62 } 119 }
63 120
64 ; ASM-LABEL: encTrap 121 ; ASM-LABEL: encTrap
65 ; ASM-NEXT: .LencTrap$__0: 122 ; ASM-NEXT: .LencTrap$__0:
66 ; ASM-NEXT: teq $zero, $zero, 0 123 ; ASM-NEXT: teq $zero, $zero, 0
67 124
68 ; DIS-LABEL: 00000010 <encTrap>: 125 ; DIS-LABEL: 00000030 <encTrap>:
69 ; DIS-NEXT: 10:» 00000034 » teq» zero,zero 126 ; DIS-NEXT: 30:» 00000034 » teq» zero,zero
70 127
71 ; IASM-LABEL: encTrap: 128 ; IASM-LABEL: encTrap:
72 ; IASM-NEXT: .LencTrap$__0: 129 ; IASM-NEXT: .LencTrap$__0:
73 ; IASM-NEXT: .byte 0x34 130 ; IASM-NEXT: .byte 0x34
74 ; IASM-NEXT: .byte 0x0 131 ; IASM-NEXT: .byte 0x0
75 ; IASM-NEXT: .byte 0x0 132 ; IASM-NEXT: .byte 0x0
76 ; IASM-NEXT: .byte 0x0 133 ; IASM-NEXT: .byte 0x0
OLDNEW
« no previous file with comments | « src/IceTargetLoweringMIPS32.cpp ('k') | tests_lit/llvm2ice_tests/nacl-other-intrinsics.ll » ('j') | no next file with comments »

Powered by Google App Engine
This is Rietveld 408576698