| OLD | NEW |
| 1 //===- subzero/src/IceAssemblerMIPS32.h - Assembler for MIPS ----*- C++ -*-===// | 1 //===- subzero/src/IceAssemblerMIPS32.h - Assembler for MIPS ----*- C++ -*-===// |
| 2 // | 2 // |
| 3 // The Subzero Code Generator | 3 // The Subzero Code Generator |
| 4 // | 4 // |
| 5 // This file is distributed under the University of Illinois Open Source | 5 // This file is distributed under the University of Illinois Open Source |
| 6 // License. See LICENSE.TXT for details. | 6 // License. See LICENSE.TXT for details. |
| 7 // | 7 // |
| 8 //===----------------------------------------------------------------------===// | 8 //===----------------------------------------------------------------------===// |
| 9 /// | 9 /// |
| 10 /// \file | 10 /// \file |
| (...skipping 200 matching lines...) Expand 10 before | Expand all | Expand 10 after Loading... |
| 211 void sqrt_s(const Operand *OpFd, const Operand *OpFs); | 211 void sqrt_s(const Operand *OpFd, const Operand *OpFs); |
| 212 | 212 |
| 213 void sra(const Operand *OpRd, const Operand *OpRt, const uint32_t Sa); | 213 void sra(const Operand *OpRd, const Operand *OpRt, const uint32_t Sa); |
| 214 | 214 |
| 215 void srl(const Operand *OpRd, const Operand *OpRt, const uint32_t Sa); | 215 void srl(const Operand *OpRd, const Operand *OpRt, const uint32_t Sa); |
| 216 | 216 |
| 217 void sub_d(const Operand *OpFd, const Operand *OpFs, const Operand *OpFt); | 217 void sub_d(const Operand *OpFd, const Operand *OpFs, const Operand *OpFt); |
| 218 | 218 |
| 219 void sub_s(const Operand *OpFd, const Operand *OpFs, const Operand *OpFt); | 219 void sub_s(const Operand *OpFd, const Operand *OpFs, const Operand *OpFt); |
| 220 | 220 |
| 221 void subu(const Operand *OpRd, const Operand *OpRs, const Operand *OpRt); |
| 222 |
| 221 void sw(const Operand *OpRt, const Operand *OpBase, const uint32_t Offset); | 223 void sw(const Operand *OpRt, const Operand *OpBase, const uint32_t Offset); |
| 222 | 224 |
| 223 void teq(const Operand *OpRs, const Operand *OpRt, const uint32_t TrapCode); | 225 void teq(const Operand *OpRs, const Operand *OpRt, const uint32_t TrapCode); |
| 224 | 226 |
| 225 void trunc_l_d(const Operand *OpFd, const Operand *OpFs); | 227 void trunc_l_d(const Operand *OpFd, const Operand *OpFs); |
| 226 | 228 |
| 227 void trunc_l_s(const Operand *OpFd, const Operand *OpFs); | 229 void trunc_l_s(const Operand *OpFd, const Operand *OpFs); |
| 228 | 230 |
| 229 void trunc_w_d(const Operand *OpFd, const Operand *OpFs); | 231 void trunc_w_d(const Operand *OpFd, const Operand *OpFs); |
| 230 | 232 |
| (...skipping 71 matching lines...) Expand 10 before | Expand all | Expand 10 after Loading... |
| 302 void emitInst(IValueT Value) { | 304 void emitInst(IValueT Value) { |
| 303 AssemblerBuffer::EnsureCapacity _(&Buffer); | 305 AssemblerBuffer::EnsureCapacity _(&Buffer); |
| 304 Buffer.emit<IValueT>(Value); | 306 Buffer.emit<IValueT>(Value); |
| 305 } | 307 } |
| 306 }; | 308 }; |
| 307 | 309 |
| 308 } // end of namespace MIPS32 | 310 } // end of namespace MIPS32 |
| 309 } // end of namespace Ice | 311 } // end of namespace Ice |
| 310 | 312 |
| 311 #endif // SUBZERO_SRC_ICEASSEMBLERMIPS32_H | 313 #endif // SUBZERO_SRC_ICEASSEMBLERMIPS32_H |
| OLD | NEW |