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Side by Side Diff: src/IceAssemblerMIPS32.cpp

Issue 2358393004: Subzero, MIPS32: Intrinsic call Cttz for i32 (Closed) Base URL: https://chromium.googlesource.com/native_client/pnacl-subzero.git@master
Patch Set: Changes as advised Created 4 years, 3 months ago
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1 //===- subzero/src/IceAssemblerMIPS32.cpp - MIPS32 Assembler --------------===// 1 //===- subzero/src/IceAssemblerMIPS32.cpp - MIPS32 Assembler --------------===//
2 // 2 //
3 // The Subzero Code Generator 3 // The Subzero Code Generator
4 // 4 //
5 // This file is distributed under the University of Illinois Open Source 5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details. 6 // License. See LICENSE.TXT for details.
7 // 7 //
8 //===----------------------------------------------------------------------===// 8 //===----------------------------------------------------------------------===//
9 /// 9 ///
10 /// \file 10 /// \file
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770 static constexpr IValueT Opcode = 0x44000001; 770 static constexpr IValueT Opcode = 0x44000001;
771 emitCOP1FmtFtFsFd(Opcode, DoublePrecision, OpFd, OpFs, OpFt, "sub.d"); 771 emitCOP1FmtFtFsFd(Opcode, DoublePrecision, OpFd, OpFs, OpFt, "sub.d");
772 } 772 }
773 773
774 void AssemblerMIPS32::sub_s(const Operand *OpFd, const Operand *OpFs, 774 void AssemblerMIPS32::sub_s(const Operand *OpFd, const Operand *OpFs,
775 const Operand *OpFt) { 775 const Operand *OpFt) {
776 static constexpr IValueT Opcode = 0x44000001; 776 static constexpr IValueT Opcode = 0x44000001;
777 emitCOP1FmtFtFsFd(Opcode, SinglePrecision, OpFd, OpFs, OpFt, "sub.s"); 777 emitCOP1FmtFtFsFd(Opcode, SinglePrecision, OpFd, OpFs, OpFt, "sub.s");
778 } 778 }
779 779
780 void AssemblerMIPS32::subu(const Operand *OpRd, const Operand *OpRs,
781 const Operand *OpRt) {
782 static constexpr IValueT Opcode = 0x00000023;
783 emitRdRsRt(Opcode, OpRd, OpRs, OpRt, "subu");
784 }
785
780 void AssemblerMIPS32::sw(const Operand *OpRt, const Operand *OpBase, 786 void AssemblerMIPS32::sw(const Operand *OpRt, const Operand *OpBase,
781 const uint32_t Offset) { 787 const uint32_t Offset) {
782 switch (OpRt->getType()) { 788 switch (OpRt->getType()) {
783 case IceType_i1: 789 case IceType_i1:
784 case IceType_i8: { 790 case IceType_i8: {
785 static constexpr IValueT Opcode = 0xA0000000; 791 static constexpr IValueT Opcode = 0xA0000000;
786 emitRtRsImm16(Opcode, OpRt, OpBase, Offset, "sb"); 792 emitRtRsImm16(Opcode, OpRt, OpBase, Offset, "sb");
787 break; 793 break;
788 } 794 }
789 case IceType_i16: { 795 case IceType_i16: {
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922 emitBr(Cond, OpRs, OpRtNone, Dest); 928 emitBr(Cond, OpRs, OpRtNone, Dest);
923 return; 929 return;
924 } 930 }
925 const IOffsetT Position = Buffer.size(); 931 const IOffsetT Position = Buffer.size();
926 emitBr(Cond, OpRs, OpRtNone, TargetLabel->getEncodedPosition()); 932 emitBr(Cond, OpRs, OpRtNone, TargetLabel->getEncodedPosition());
927 TargetLabel->linkTo(*this, Position); 933 TargetLabel->linkTo(*this, Position);
928 } 934 }
929 935
930 } // end of namespace MIPS32 936 } // end of namespace MIPS32
931 } // end of namespace Ice 937 } // end of namespace Ice
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