Subzero, MIPS32: Intrinsic call Cttz for i32

tests_lit/llvm2ice_tests/nacl-other-intrinsics.ll

 ; This tests the NaCl intrinsics not related to atomic operations.
 
 ; RUN: %if --need=target_X8632 --command %p2i --filetype=obj --disassemble \
 ; RUN:   --target x8632 --sandbox -i %s --args -O2 \
 ; RUN:   -allow-externally-defined-symbols \
 ; RUN:   | %if --need=target_X8632 --command FileCheck %s
 ; RUN: %if --need=target_X8632 --command %p2i --filetype=obj --disassemble \
 ; RUN:   --target x8632 --sandbox -i %s --args -Om1 \
 ; RUN:   -allow-externally-defined-symbols \
 ; RUN:   | %if --need=target_X8632 --command FileCheck %s
@@ skipping 464 matching lines @@
   %r = call i32 @llvm.cttz.i32(i32 %x, i1 false)
   ret i32 %r
 }
 ; CHECK-LABEL: test_cttz_32
 ; CHECK: bsf [[REG_IF_NOTZERO:e.*]],{{.*}}
 ; CHECK: mov [[REG_IF_ZERO:e.*]],0x20
 ; CHECK: cmovne [[REG_IF_ZERO]],[[REG_IF_NOTZERO]]
 ; ARM32-LABEL: test_cttz_32
 ; ARM32: rbit
 ; ARM32: clz
+; MIPS32-LABEL: test_cttz_32
+; MIPS32: clz
 
 define internal i64 @test_cttz_64(i64 %x) {
 entry:
   %r = call i64 @llvm.cttz.i64(i64 %x, i1 false)
   ret i64 %r
 }
 ; CHECK-LABEL: test_cttz_64
 ; CHECK: bsf [[REG_IF_NOTZERO:e.*]],{{.*}}
 ; CHECK: mov [[REG_RES1:e.*]],0x20
 ; CHECK: cmovne [[REG_RES1]],[[REG_IF_NOTZERO]]
@@ skipping 105 matching lines @@
 ; CHECK: lea {{.*}},[esp+0x10]
 ; CHECK: lea {{.*}},[esp+0x10]
 ; CHECK: call
 ; CHECK: mov esp,{{.*}}
 ; CHECK: mov esp,ebp
 ; ARM32-LABEL: test_stacksave_multiple
 ; ARM32: mov {{.*}}, sp
 ; ARM32: mov {{.*}}, sp
 ; ARM32: mov {{.*}}, sp
 ; ARM32: mov sp, {{.*}}