[SubZero] Fix floating-point comparison for MIPS

src/IceAssemblerMIPS32.cpp

 //===- subzero/src/IceAssemblerMIPS32.cpp - MIPS32 Assembler --------------===//
 //
 //                        The Subzero Code Generator
 //
 // This file is distributed under the University of Illinois Open Source
 // License. See LICENSE.TXT for details.
 //
 //===----------------------------------------------------------------------===//
 ///
 /// \file
@@ skipping 609 matching lines @@
 
 void AssemblerMIPS32::movn_s(const Operand *OpFd, const Operand *OpFs,
                              const Operand *OpFt) {
   static constexpr IValueT Opcode = 0x44000013;
   emitCOP1FmtFtFsFd(Opcode, SinglePrecision, OpFd, OpFs, OpFt, "movn.s");
 }
 
 void AssemblerMIPS32::movt(const Operand *OpRd, const Operand *OpRs,
                            const Operand *OpCc) {
   IValueT Opcode = 0x00000001;
-  const IValueT Rd = encodeGPRegister(OpRd, "Rd", "movf");
-  const IValueT Rs = encodeGPRegister(OpRs, "Rs", "movf");
+  const IValueT Rd = encodeGPRegister(OpRd, "Rd", "movt");
+  const IValueT Rs = encodeGPRegister(OpRs, "Rs", "movt");
   OperandMIPS32FCC::FCC Cc = OperandMIPS32FCC::FCC0;
   if (const auto *OpFCC = llvm::dyn_cast<OperandMIPS32FCC>(OpCc)) {
     Cc = OpFCC->getFCC();
   }
   const IValueT InstEncodingTrue = 1;
   Opcode |= Rd << 11;
   Opcode |= InstEncodingTrue << 16;
   Opcode |= Cc << 18;
   Opcode |= Rs << 21;
   emitInst(Opcode);
@@ skipping 255 matching lines @@
     emitBr(Cond, OpRs, OpRtNone, Dest);
     return;
   }
   const IOffsetT Position = Buffer.size();
   emitBr(Cond, OpRs, OpRtNone, TargetLabel->getEncodedPosition());
   TargetLabel->linkTo(*this, Position);
 }
 
 } // end of namespace MIPS32
 } // end of namespace Ice