Subzero, MIPS32: Instruction NOR, pseudoinstruction NOT

src/IceTargetLoweringMIPS32.h

 //===- subzero/src/IceTargetLoweringMIPS32.h - MIPS32 lowering ---*- C++-*-===//
 //
 //                        The Subzero Code Generator
 //
 // This file is distributed under the University of Illinois Open Source
 // License. See LICENSE.TXT for details.
 //
 //===----------------------------------------------------------------------===//
 ///
 /// \file
@@ skipping 406 matching lines @@
   void _mult(Variable *Dest, Variable *Src0, Variable *Src1) {
     Context.insert<InstMIPS32Mult>(Dest, Src0, Src1);
   }
 
   void _multu(Variable *Dest, Variable *Src0, Variable *Src1) {
     Context.insert<InstMIPS32Multu>(Dest, Src0, Src1);
   }
 
   void _nop() { Context.insert<InstMIPS32Sll>(getZero(), getZero(), 0); }
 
+  void _nor(Variable *Dest, Variable *Src0, Variable *Src1) {
+    Context.insert<InstMIPS32Nor>(Dest, Src0, Src1);
+  }
+
+  void _not(Variable *Dest, Variable *Src0) {
+    Context.insert<InstMIPS32Nor>(Dest, Src0, getZero());
+  }
+
   void _or(Variable *Dest, Variable *Src0, Variable *Src1) {
     Context.insert<InstMIPS32Or>(Dest, Src0, Src1);
   }
 
   void _ori(Variable *Dest, Variable *Src, uint32_t Imm) {
     Context.insert<InstMIPS32Ori>(Dest, Src, Imm);
   }
 
   void _sdc1(Variable *Value, OperandMIPS32Mem *Mem) {
     Context.insert<InstMIPS32Sdc1>(Value, Mem);
@@ skipping 412 matching lines @@
   explicit TargetHeaderMIPS32(GlobalContext *Ctx);
 
 private:
   ~TargetHeaderMIPS32() = default;
 };
 
 } // end of namespace MIPS32
 } // end of namespace Ice
 
 #endif // SUBZERO_SRC_ICETARGETLOWERINGMIPS32_H