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| 1 //===- subzero/src/IceInstMIPS32.h - MIPS32 machine instrs --*- C++ -*-----===// | 1 //===- subzero/src/IceInstMIPS32.h - MIPS32 machine instrs --*- C++ -*-----===// |
| 2 // | 2 // |
| 3 // The Subzero Code Generator | 3 // The Subzero Code Generator |
| 4 // | 4 // |
| 5 // This file is distributed under the University of Illinois Open Source | 5 // This file is distributed under the University of Illinois Open Source |
| 6 // License. See LICENSE.TXT for details. | 6 // License. See LICENSE.TXT for details. |
| 7 // | 7 // |
| 8 //===----------------------------------------------------------------------===// | 8 //===----------------------------------------------------------------------===// |
| 9 /// | 9 /// |
| 10 /// \file | 10 /// \file |
| (...skipping 229 matching lines...) Expand 10 before | Expand all | Expand 10 after Loading... |
| 240 Movz_d, | 240 Movz_d, |
| 241 Movz_s, | 241 Movz_s, |
| 242 Mtc1, | 242 Mtc1, |
| 243 Mthi, | 243 Mthi, |
| 244 Mtlo, | 244 Mtlo, |
| 245 Mul, | 245 Mul, |
| 246 Mul_d, | 246 Mul_d, |
| 247 Mul_s, | 247 Mul_s, |
| 248 Mult, | 248 Mult, |
| 249 Multu, | 249 Multu, |
| 250 Nor, |
| 250 Or, | 251 Or, |
| 251 Ori, | 252 Ori, |
| 252 Ret, | 253 Ret, |
| 253 Sdc1, | 254 Sdc1, |
| 254 Sll, | 255 Sll, |
| 255 Sllv, | 256 Sllv, |
| 256 Slt, | 257 Slt, |
| 257 Slti, | 258 Slti, |
| 258 Sltiu, | 259 Sltiu, |
| 259 Sltu, | 260 Sltu, |
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| 1154 using InstMIPS32Movz_d = InstMIPS32ThreeAddrGPR<InstMIPS32::Movz_d>; | 1155 using InstMIPS32Movz_d = InstMIPS32ThreeAddrGPR<InstMIPS32::Movz_d>; |
| 1155 using InstMIPS32Movz_s = InstMIPS32ThreeAddrGPR<InstMIPS32::Movz_s>; | 1156 using InstMIPS32Movz_s = InstMIPS32ThreeAddrGPR<InstMIPS32::Movz_s>; |
| 1156 using InstMIPS32Mtc1 = InstMIPS32TwoAddrGPR<InstMIPS32::Mtc1>; | 1157 using InstMIPS32Mtc1 = InstMIPS32TwoAddrGPR<InstMIPS32::Mtc1>; |
| 1157 using InstMIPS32Mthi = InstMIPS32UnaryopGPR<InstMIPS32::Mthi>; | 1158 using InstMIPS32Mthi = InstMIPS32UnaryopGPR<InstMIPS32::Mthi>; |
| 1158 using InstMIPS32Mtlo = InstMIPS32UnaryopGPR<InstMIPS32::Mtlo>; | 1159 using InstMIPS32Mtlo = InstMIPS32UnaryopGPR<InstMIPS32::Mtlo>; |
| 1159 using InstMIPS32Mul = InstMIPS32ThreeAddrGPR<InstMIPS32::Mul>; | 1160 using InstMIPS32Mul = InstMIPS32ThreeAddrGPR<InstMIPS32::Mul>; |
| 1160 using InstMIPS32Mul_d = InstMIPS32ThreeAddrFPR<InstMIPS32::Mul_d>; | 1161 using InstMIPS32Mul_d = InstMIPS32ThreeAddrFPR<InstMIPS32::Mul_d>; |
| 1161 using InstMIPS32Mul_s = InstMIPS32ThreeAddrFPR<InstMIPS32::Mul_s>; | 1162 using InstMIPS32Mul_s = InstMIPS32ThreeAddrFPR<InstMIPS32::Mul_s>; |
| 1162 using InstMIPS32Mult = InstMIPS32ThreeAddrGPR<InstMIPS32::Mult>; | 1163 using InstMIPS32Mult = InstMIPS32ThreeAddrGPR<InstMIPS32::Mult>; |
| 1163 using InstMIPS32Multu = InstMIPS32ThreeAddrGPR<InstMIPS32::Multu>; | 1164 using InstMIPS32Multu = InstMIPS32ThreeAddrGPR<InstMIPS32::Multu>; |
| 1165 using InstMIPS32Nor = InstMIPS32ThreeAddrGPR<InstMIPS32::Nor>; |
| 1164 using InstMIPS32Or = InstMIPS32ThreeAddrGPR<InstMIPS32::Or>; | 1166 using InstMIPS32Or = InstMIPS32ThreeAddrGPR<InstMIPS32::Or>; |
| 1165 using InstMIPS32Ori = InstMIPS32Imm16<InstMIPS32::Ori>; | 1167 using InstMIPS32Ori = InstMIPS32Imm16<InstMIPS32::Ori>; |
| 1166 using InstMIPS32Sdc1 = InstMIPS32Store<InstMIPS32::Sdc1>; | 1168 using InstMIPS32Sdc1 = InstMIPS32Store<InstMIPS32::Sdc1>; |
| 1167 using InstMIPS32Sll = InstMIPS32Imm16<InstMIPS32::Sll>; | 1169 using InstMIPS32Sll = InstMIPS32Imm16<InstMIPS32::Sll>; |
| 1168 using InstMIPS32Sllv = InstMIPS32ThreeAddrGPR<InstMIPS32::Sllv>; | 1170 using InstMIPS32Sllv = InstMIPS32ThreeAddrGPR<InstMIPS32::Sllv>; |
| 1169 using InstMIPS32Slt = InstMIPS32ThreeAddrGPR<InstMIPS32::Slt>; | 1171 using InstMIPS32Slt = InstMIPS32ThreeAddrGPR<InstMIPS32::Slt>; |
| 1170 using InstMIPS32Slti = InstMIPS32Imm16<InstMIPS32::Slti>; | 1172 using InstMIPS32Slti = InstMIPS32Imm16<InstMIPS32::Slti>; |
| 1171 using InstMIPS32Sltiu = InstMIPS32Imm16<InstMIPS32::Sltiu>; | 1173 using InstMIPS32Sltiu = InstMIPS32Imm16<InstMIPS32::Sltiu>; |
| 1172 using InstMIPS32Sltu = InstMIPS32ThreeAddrGPR<InstMIPS32::Sltu>; | 1174 using InstMIPS32Sltu = InstMIPS32ThreeAddrGPR<InstMIPS32::Sltu>; |
| 1173 using InstMIPS32Sqrt_d = InstMIPS32TwoAddrFPR<InstMIPS32::Sqrt_d>; | 1175 using InstMIPS32Sqrt_d = InstMIPS32TwoAddrFPR<InstMIPS32::Sqrt_d>; |
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| 1277 template <> void InstMIPS32Movt::emitIAS(const Cfg *Func) const; | 1279 template <> void InstMIPS32Movt::emitIAS(const Cfg *Func) const; |
| 1278 template <> void InstMIPS32Movz_d::emitIAS(const Cfg *Func) const; | 1280 template <> void InstMIPS32Movz_d::emitIAS(const Cfg *Func) const; |
| 1279 template <> void InstMIPS32Movz_s::emitIAS(const Cfg *Func) const; | 1281 template <> void InstMIPS32Movz_s::emitIAS(const Cfg *Func) const; |
| 1280 template <> void InstMIPS32Mtc1::emit(const Cfg *Func) const; | 1282 template <> void InstMIPS32Mtc1::emit(const Cfg *Func) const; |
| 1281 template <> void InstMIPS32Mtlo::emit(const Cfg *Func) const; | 1283 template <> void InstMIPS32Mtlo::emit(const Cfg *Func) const; |
| 1282 template <> void InstMIPS32Mthi::emit(const Cfg *Func) const; | 1284 template <> void InstMIPS32Mthi::emit(const Cfg *Func) const; |
| 1283 template <> void InstMIPS32Mul_d::emitIAS(const Cfg *Func) const; | 1285 template <> void InstMIPS32Mul_d::emitIAS(const Cfg *Func) const; |
| 1284 template <> void InstMIPS32Mul_s::emitIAS(const Cfg *Func) const; | 1286 template <> void InstMIPS32Mul_s::emitIAS(const Cfg *Func) const; |
| 1285 template <> void InstMIPS32Mult::emit(const Cfg *Func) const; | 1287 template <> void InstMIPS32Mult::emit(const Cfg *Func) const; |
| 1286 template <> void InstMIPS32Multu::emit(const Cfg *Func) const; | 1288 template <> void InstMIPS32Multu::emit(const Cfg *Func) const; |
| 1289 template <> void InstMIPS32Nor::emitIAS(const Cfg *Func) const; |
| 1287 template <> void InstMIPS32Or::emitIAS(const Cfg *Func) const; | 1290 template <> void InstMIPS32Or::emitIAS(const Cfg *Func) const; |
| 1288 template <> void InstMIPS32Ori::emitIAS(const Cfg *Func) const; | 1291 template <> void InstMIPS32Ori::emitIAS(const Cfg *Func) const; |
| 1289 template <> void InstMIPS32Sll::emitIAS(const Cfg *Func) const; | 1292 template <> void InstMIPS32Sll::emitIAS(const Cfg *Func) const; |
| 1290 template <> void InstMIPS32Slt::emitIAS(const Cfg *Func) const; | 1293 template <> void InstMIPS32Slt::emitIAS(const Cfg *Func) const; |
| 1291 template <> void InstMIPS32Slti::emitIAS(const Cfg *Func) const; | 1294 template <> void InstMIPS32Slti::emitIAS(const Cfg *Func) const; |
| 1292 template <> void InstMIPS32Sltiu::emitIAS(const Cfg *Func) const; | 1295 template <> void InstMIPS32Sltiu::emitIAS(const Cfg *Func) const; |
| 1293 template <> void InstMIPS32Sltu::emitIAS(const Cfg *Func) const; | 1296 template <> void InstMIPS32Sltu::emitIAS(const Cfg *Func) const; |
| 1294 template <> void InstMIPS32Sqrt_d::emitIAS(const Cfg *Func) const; | 1297 template <> void InstMIPS32Sqrt_d::emitIAS(const Cfg *Func) const; |
| 1295 template <> void InstMIPS32Sqrt_s::emitIAS(const Cfg *Func) const; | 1298 template <> void InstMIPS32Sqrt_s::emitIAS(const Cfg *Func) const; |
| 1296 template <> void InstMIPS32Sw::emitIAS(const Cfg *Func) const; | 1299 template <> void InstMIPS32Sw::emitIAS(const Cfg *Func) const; |
| 1297 template <> void InstMIPS32Sra::emitIAS(const Cfg *Func) const; | 1300 template <> void InstMIPS32Sra::emitIAS(const Cfg *Func) const; |
| 1298 template <> void InstMIPS32Srl::emitIAS(const Cfg *Func) const; | 1301 template <> void InstMIPS32Srl::emitIAS(const Cfg *Func) const; |
| 1299 template <> void InstMIPS32Sub_d::emitIAS(const Cfg *Func) const; | 1302 template <> void InstMIPS32Sub_d::emitIAS(const Cfg *Func) const; |
| 1300 template <> void InstMIPS32Sub_s::emitIAS(const Cfg *Func) const; | 1303 template <> void InstMIPS32Sub_s::emitIAS(const Cfg *Func) const; |
| 1301 template <> void InstMIPS32Teq::emitIAS(const Cfg *Func) const; | 1304 template <> void InstMIPS32Teq::emitIAS(const Cfg *Func) const; |
| 1302 template <> void InstMIPS32Trunc_l_d::emitIAS(const Cfg *Func) const; | 1305 template <> void InstMIPS32Trunc_l_d::emitIAS(const Cfg *Func) const; |
| 1303 template <> void InstMIPS32Trunc_l_s::emitIAS(const Cfg *Func) const; | 1306 template <> void InstMIPS32Trunc_l_s::emitIAS(const Cfg *Func) const; |
| 1304 template <> void InstMIPS32Trunc_w_d::emitIAS(const Cfg *Func) const; | 1307 template <> void InstMIPS32Trunc_w_d::emitIAS(const Cfg *Func) const; |
| 1305 template <> void InstMIPS32Trunc_w_s::emitIAS(const Cfg *Func) const; | 1308 template <> void InstMIPS32Trunc_w_s::emitIAS(const Cfg *Func) const; |
| 1306 template <> void InstMIPS32Xor::emitIAS(const Cfg *Func) const; | 1309 template <> void InstMIPS32Xor::emitIAS(const Cfg *Func) const; |
| 1307 template <> void InstMIPS32Xori::emitIAS(const Cfg *Func) const; | 1310 template <> void InstMIPS32Xori::emitIAS(const Cfg *Func) const; |
| 1308 | 1311 |
| 1309 } // end of namespace MIPS32 | 1312 } // end of namespace MIPS32 |
| 1310 } // end of namespace Ice | 1313 } // end of namespace Ice |
| 1311 | 1314 |
| 1312 #endif // SUBZERO_SRC_ICEINSTMIPS32_H | 1315 #endif // SUBZERO_SRC_ICEINSTMIPS32_H |
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