Subzero, MIPS32: Instruction NOR, pseudoinstruction NOT

src/IceInstMIPS32.cpp

 //===- subzero/src/IceInstMips32.cpp - Mips32 instruction implementation --===//
 //
 //                        The Subzero Code Generator
 //
 // This file is distributed under the University of Illinois Open Source
 // License. See LICENSE.TXT for details.
 //
 //===----------------------------------------------------------------------===//
 //
 /// \file
@@ skipping 101 matching lines @@
 template <> const char *InstMIPS32Movz_d::Opcode = "movz.d";
 template <> const char *InstMIPS32Movz_s::Opcode = "movz.s";
 template <> const char *InstMIPS32Mtc1::Opcode = "mtc1";
 template <> const char *InstMIPS32Mthi::Opcode = "mthi";
 template <> const char *InstMIPS32Mtlo::Opcode = "mtlo";
 template <> const char *InstMIPS32Mul::Opcode = "mul";
 template <> const char *InstMIPS32Mul_d::Opcode = "mul.d";
 template <> const char *InstMIPS32Mul_s::Opcode = "mul.s";
 template <> const char *InstMIPS32Mult::Opcode = "mult";
 template <> const char *InstMIPS32Multu::Opcode = "multu";
+template <> const char *InstMIPS32Nor::Opcode = "nor";
 template <> const char *InstMIPS32Or::Opcode = "or";
 template <> const char *InstMIPS32Ori::Opcode = "ori";
 template <> const char *InstMIPS32Sdc1::Opcode = "sdc1";
 template <> const char *InstMIPS32Sll::Opcode = "sll";
 template <> const char *InstMIPS32Sllv::Opcode = "sllv";
 template <> const char *InstMIPS32Slt::Opcode = "slt";
 template <> const char *InstMIPS32Slti::Opcode = "slti";
 template <> const char *InstMIPS32Sltiu::Opcode = "sltiu";
 template <> const char *InstMIPS32Sltu::Opcode = "sltu";
 template <> const char *InstMIPS32Sqrt_d::Opcode = "sqrt.d";
@@ skipping 858 matching lines @@
     return;
   emitThreeAddrLoHi(Opcode, this, Func);
 }
 
 template <> void InstMIPS32Multu::emit(const Cfg *Func) const {
   if (!BuildDefs::dump())
     return;
   emitThreeAddrLoHi(Opcode, this, Func);
 }
 
+template <> void InstMIPS32Nor::emitIAS(const Cfg *Func) const {
+  auto *Asm = Func->getAssembler<MIPS32::AssemblerMIPS32>();
+  Asm->nor(getDest(), getSrc(0), getSrc(1));
+}
+
 template <> void InstMIPS32Or::emitIAS(const Cfg *Func) const {
   auto *Asm = Func->getAssembler<MIPS32::AssemblerMIPS32>();
   Asm->or_(getDest(), getSrc(0), getSrc(1));
 }
 
 template <> void InstMIPS32Ori::emitIAS(const Cfg *Func) const {
   auto *Asm = Func->getAssembler<MIPS32::AssemblerMIPS32>();
   Asm->ori(getDest(), getSrc(0), Imm);
 }
 
@@ skipping 90 matching lines @@
   Asm->xor_(getDest(), getSrc(0), getSrc(1));
 }
 
 template <> void InstMIPS32Xori::emitIAS(const Cfg *Func) const {
   auto *Asm = Func->getAssembler<MIPS32::AssemblerMIPS32>();
   Asm->xori(getDest(), getSrc(0), Imm);
 }
 
 } // end of namespace MIPS32
 } // end of namespace Ice