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Side by Side Diff: src/IceAssemblerMIPS32.h

Issue 2356293002: Subzero, MIPS32: Instruction NOR, pseudoinstruction NOT (Closed) Base URL: https://chromium.googlesource.com/native_client/pnacl-subzero.git@master
Patch Set: Addressing review comments Created 4 years, 2 months ago
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1 //===- subzero/src/IceAssemblerMIPS32.h - Assembler for MIPS ----*- C++ -*-===// 1 //===- subzero/src/IceAssemblerMIPS32.h - Assembler for MIPS ----*- C++ -*-===//
2 // 2 //
3 // The Subzero Code Generator 3 // The Subzero Code Generator
4 // 4 //
5 // This file is distributed under the University of Illinois Open Source 5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details. 6 // License. See LICENSE.TXT for details.
7 // 7 //
8 //===----------------------------------------------------------------------===// 8 //===----------------------------------------------------------------------===//
9 /// 9 ///
10 /// \file 10 /// \file
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177 void movz_d(const Operand *OpFd, const Operand *OpFs, const Operand *OpFt); 177 void movz_d(const Operand *OpFd, const Operand *OpFs, const Operand *OpFt);
178 178
179 void movz_s(const Operand *OpFd, const Operand *OpFs, const Operand *OpFt); 179 void movz_s(const Operand *OpFd, const Operand *OpFs, const Operand *OpFt);
180 180
181 void mtc1(const Operand *OpRt, const Operand *OpFs); 181 void mtc1(const Operand *OpRt, const Operand *OpFs);
182 182
183 void mul_d(const Operand *OpFd, const Operand *OpFs, const Operand *OpFt); 183 void mul_d(const Operand *OpFd, const Operand *OpFs, const Operand *OpFt);
184 184
185 void mul_s(const Operand *OpFd, const Operand *OpFs, const Operand *OpFt); 185 void mul_s(const Operand *OpFd, const Operand *OpFs, const Operand *OpFt);
186 186
187 void nor(const Operand *OpRd, const Operand *OpRs, const Operand *OpRt);
188
187 void or_(const Operand *OpRd, const Operand *OpRs, const Operand *OpRt); 189 void or_(const Operand *OpRd, const Operand *OpRs, const Operand *OpRt);
188 190
189 void ori(const Operand *OpRt, const Operand *OpRs, const uint32_t Imm); 191 void ori(const Operand *OpRt, const Operand *OpRs, const uint32_t Imm);
190 192
191 void ret(void); 193 void ret(void);
192 194
193 void sll(const Operand *OpRd, const Operand *OpRt, const uint32_t Sa); 195 void sll(const Operand *OpRd, const Operand *OpRt, const uint32_t Sa);
194 196
195 void slt(const Operand *OpRd, const Operand *OpRs, const Operand *OpRt); 197 void slt(const Operand *OpRd, const Operand *OpRs, const Operand *OpRt);
196 198
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296 void emitInst(IValueT Value) { 298 void emitInst(IValueT Value) {
297 AssemblerBuffer::EnsureCapacity _(&Buffer); 299 AssemblerBuffer::EnsureCapacity _(&Buffer);
298 Buffer.emit<IValueT>(Value); 300 Buffer.emit<IValueT>(Value);
299 } 301 }
300 }; 302 };
301 303
302 } // end of namespace MIPS32 304 } // end of namespace MIPS32
303 } // end of namespace Ice 305 } // end of namespace Ice
304 306
305 #endif // SUBZERO_SRC_ICEASSEMBLERMIPS32_H 307 #endif // SUBZERO_SRC_ICEASSEMBLERMIPS32_H
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