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1 //===- subzero/src/IceInstMIPS32.h - MIPS32 machine instrs --*- C++ -*-----===// | 1 //===- subzero/src/IceInstMIPS32.h - MIPS32 machine instrs --*- C++ -*-----===// |
2 // | 2 // |
3 // The Subzero Code Generator | 3 // The Subzero Code Generator |
4 // | 4 // |
5 // This file is distributed under the University of Illinois Open Source | 5 // This file is distributed under the University of Illinois Open Source |
6 // License. See LICENSE.TXT for details. | 6 // License. See LICENSE.TXT for details. |
7 // | 7 // |
8 //===----------------------------------------------------------------------===// | 8 //===----------------------------------------------------------------------===// |
9 /// | 9 /// |
10 /// \file | 10 /// \file |
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240 Movz_d, | 240 Movz_d, |
241 Movz_s, | 241 Movz_s, |
242 Mtc1, | 242 Mtc1, |
243 Mthi, | 243 Mthi, |
244 Mtlo, | 244 Mtlo, |
245 Mul, | 245 Mul, |
246 Mul_d, | 246 Mul_d, |
247 Mul_s, | 247 Mul_s, |
248 Mult, | 248 Mult, |
249 Multu, | 249 Multu, |
250 Nor, | |
250 Or, | 251 Or, |
251 Ori, | 252 Ori, |
252 Ret, | 253 Ret, |
253 Sdc1, | 254 Sdc1, |
254 Sll, | 255 Sll, |
255 Sllv, | 256 Sllv, |
256 Slt, | 257 Slt, |
257 Slti, | 258 Slti, |
258 Sltiu, | 259 Sltiu, |
259 Sltu, | 260 Sltu, |
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1154 using InstMIPS32Movz_d = InstMIPS32ThreeAddrGPR<InstMIPS32::Movz_d>; | 1155 using InstMIPS32Movz_d = InstMIPS32ThreeAddrGPR<InstMIPS32::Movz_d>; |
1155 using InstMIPS32Movz_s = InstMIPS32ThreeAddrGPR<InstMIPS32::Movz_s>; | 1156 using InstMIPS32Movz_s = InstMIPS32ThreeAddrGPR<InstMIPS32::Movz_s>; |
1156 using InstMIPS32Mtc1 = InstMIPS32TwoAddrGPR<InstMIPS32::Mtc1>; | 1157 using InstMIPS32Mtc1 = InstMIPS32TwoAddrGPR<InstMIPS32::Mtc1>; |
1157 using InstMIPS32Mthi = InstMIPS32UnaryopGPR<InstMIPS32::Mthi>; | 1158 using InstMIPS32Mthi = InstMIPS32UnaryopGPR<InstMIPS32::Mthi>; |
1158 using InstMIPS32Mtlo = InstMIPS32UnaryopGPR<InstMIPS32::Mtlo>; | 1159 using InstMIPS32Mtlo = InstMIPS32UnaryopGPR<InstMIPS32::Mtlo>; |
1159 using InstMIPS32Mul = InstMIPS32ThreeAddrGPR<InstMIPS32::Mul>; | 1160 using InstMIPS32Mul = InstMIPS32ThreeAddrGPR<InstMIPS32::Mul>; |
1160 using InstMIPS32Mul_d = InstMIPS32ThreeAddrFPR<InstMIPS32::Mul_d>; | 1161 using InstMIPS32Mul_d = InstMIPS32ThreeAddrFPR<InstMIPS32::Mul_d>; |
1161 using InstMIPS32Mul_s = InstMIPS32ThreeAddrFPR<InstMIPS32::Mul_s>; | 1162 using InstMIPS32Mul_s = InstMIPS32ThreeAddrFPR<InstMIPS32::Mul_s>; |
1162 using InstMIPS32Mult = InstMIPS32ThreeAddrGPR<InstMIPS32::Mult>; | 1163 using InstMIPS32Mult = InstMIPS32ThreeAddrGPR<InstMIPS32::Mult>; |
1163 using InstMIPS32Multu = InstMIPS32ThreeAddrGPR<InstMIPS32::Multu>; | 1164 using InstMIPS32Multu = InstMIPS32ThreeAddrGPR<InstMIPS32::Multu>; |
1165 using InstMIPS32Nor = InstMIPS32ThreeAddrGPR<InstMIPS32::Nor>; | |
1164 using InstMIPS32Or = InstMIPS32ThreeAddrGPR<InstMIPS32::Or>; | 1166 using InstMIPS32Or = InstMIPS32ThreeAddrGPR<InstMIPS32::Or>; |
1165 using InstMIPS32Ori = InstMIPS32Imm16<InstMIPS32::Ori>; | 1167 using InstMIPS32Ori = InstMIPS32Imm16<InstMIPS32::Ori>; |
1166 using InstMIPS32Sdc1 = InstMIPS32Store<InstMIPS32::Sdc1>; | 1168 using InstMIPS32Sdc1 = InstMIPS32Store<InstMIPS32::Sdc1>; |
1167 using InstMIPS32Sll = InstMIPS32Imm16<InstMIPS32::Sll>; | 1169 using InstMIPS32Sll = InstMIPS32Imm16<InstMIPS32::Sll>; |
1168 using InstMIPS32Sllv = InstMIPS32ThreeAddrGPR<InstMIPS32::Sllv>; | 1170 using InstMIPS32Sllv = InstMIPS32ThreeAddrGPR<InstMIPS32::Sllv>; |
1169 using InstMIPS32Slt = InstMIPS32ThreeAddrGPR<InstMIPS32::Slt>; | 1171 using InstMIPS32Slt = InstMIPS32ThreeAddrGPR<InstMIPS32::Slt>; |
1170 using InstMIPS32Slti = InstMIPS32Imm16<InstMIPS32::Slti>; | 1172 using InstMIPS32Slti = InstMIPS32Imm16<InstMIPS32::Slti>; |
1171 using InstMIPS32Sltiu = InstMIPS32Imm16<InstMIPS32::Sltiu>; | 1173 using InstMIPS32Sltiu = InstMIPS32Imm16<InstMIPS32::Sltiu>; |
1172 using InstMIPS32Sltu = InstMIPS32ThreeAddrGPR<InstMIPS32::Sltu>; | 1174 using InstMIPS32Sltu = InstMIPS32ThreeAddrGPR<InstMIPS32::Sltu>; |
1173 using InstMIPS32Sqrt_d = InstMIPS32TwoAddrFPR<InstMIPS32::Sqrt_d>; | 1175 using InstMIPS32Sqrt_d = InstMIPS32TwoAddrFPR<InstMIPS32::Sqrt_d>; |
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1227 void emitSingleDestMultiSource(const Cfg *Func) const; | 1229 void emitSingleDestMultiSource(const Cfg *Func) const; |
1228 void emitSingleDestSingleSource(const Cfg *Func) const; | 1230 void emitSingleDestSingleSource(const Cfg *Func) const; |
1229 | 1231 |
1230 Variable *DestHi = nullptr; | 1232 Variable *DestHi = nullptr; |
1231 }; | 1233 }; |
1232 | 1234 |
1233 // Declare partial template specializations of emit() methods that already have | 1235 // Declare partial template specializations of emit() methods that already have |
1234 // default implementations. Without this, there is the possibility of ODR | 1236 // default implementations. Without this, there is the possibility of ODR |
1235 // violations and link errors. | 1237 // violations and link errors. |
1236 | 1238 |
1237 template <> void InstMIPS32Abs_d::emitIAS(const Cfg *Func) const; | 1239 template <> void InstMIPS32Abs_d::emitIAS(const Cfg *Func) const; |
Jim Stichnoth
2016/09/22 13:52:51
Please add a declaration in this section for the n
obucinac
2016/09/22 15:16:53
Done.
| |
1238 template <> void InstMIPS32Abs_s::emitIAS(const Cfg *Func) const; | 1240 template <> void InstMIPS32Abs_s::emitIAS(const Cfg *Func) const; |
1239 template <> void InstMIPS32Add_d::emitIAS(const Cfg *Func) const; | 1241 template <> void InstMIPS32Add_d::emitIAS(const Cfg *Func) const; |
1240 template <> void InstMIPS32Add_s::emitIAS(const Cfg *Func) const; | 1242 template <> void InstMIPS32Add_s::emitIAS(const Cfg *Func) const; |
1241 template <> void InstMIPS32Addiu::emitIAS(const Cfg *Func) const; | 1243 template <> void InstMIPS32Addiu::emitIAS(const Cfg *Func) const; |
1242 template <> void InstMIPS32Addu::emitIAS(const Cfg *Func) const; | 1244 template <> void InstMIPS32Addu::emitIAS(const Cfg *Func) const; |
1243 template <> void InstMIPS32And::emitIAS(const Cfg *Func) const; | 1245 template <> void InstMIPS32And::emitIAS(const Cfg *Func) const; |
1244 template <> void InstMIPS32Andi::emitIAS(const Cfg *Func) const; | 1246 template <> void InstMIPS32Andi::emitIAS(const Cfg *Func) const; |
1245 template <> void InstMIPS32C_eq_d::emitIAS(const Cfg *Func) const; | 1247 template <> void InstMIPS32C_eq_d::emitIAS(const Cfg *Func) const; |
1246 template <> void InstMIPS32C_eq_s::emitIAS(const Cfg *Func) const; | 1248 template <> void InstMIPS32C_eq_s::emitIAS(const Cfg *Func) const; |
1247 template <> void InstMIPS32C_ole_d::emitIAS(const Cfg *Func) const; | 1249 template <> void InstMIPS32C_ole_d::emitIAS(const Cfg *Func) const; |
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1303 template <> void InstMIPS32Trunc_l_s::emitIAS(const Cfg *Func) const; | 1305 template <> void InstMIPS32Trunc_l_s::emitIAS(const Cfg *Func) const; |
1304 template <> void InstMIPS32Trunc_w_d::emitIAS(const Cfg *Func) const; | 1306 template <> void InstMIPS32Trunc_w_d::emitIAS(const Cfg *Func) const; |
1305 template <> void InstMIPS32Trunc_w_s::emitIAS(const Cfg *Func) const; | 1307 template <> void InstMIPS32Trunc_w_s::emitIAS(const Cfg *Func) const; |
1306 template <> void InstMIPS32Xor::emitIAS(const Cfg *Func) const; | 1308 template <> void InstMIPS32Xor::emitIAS(const Cfg *Func) const; |
1307 template <> void InstMIPS32Xori::emitIAS(const Cfg *Func) const; | 1309 template <> void InstMIPS32Xori::emitIAS(const Cfg *Func) const; |
1308 | 1310 |
1309 } // end of namespace MIPS32 | 1311 } // end of namespace MIPS32 |
1310 } // end of namespace Ice | 1312 } // end of namespace Ice |
1311 | 1313 |
1312 #endif // SUBZERO_SRC_ICEINSTMIPS32_H | 1314 #endif // SUBZERO_SRC_ICEINSTMIPS32_H |
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