Thumb2 Backend: 16-bit instruction encoding helper methods

src/arm/assembler-arm.h

 // Copyright (c) 1994-2006 Sun Microsystems Inc.
 // All Rights Reserved.
 //
 // Redistribution and use in source and binary forms, with or without
 // modification, are permitted provided that the following conditions
 // are met:
 //
 // - Redistributions of source code must retain the above copyright notice,
 // this list of conditions and the following disclaimer.
 //
@@ skipping 1346 matching lines @@
   // for inline tables, e.g., jump-tables. The constant pool should be
   // emitted before any use of db and dd to ensure that constant pools
   // are not emitted as part of the tables generated.
   void db(uint8_t data);
   void dd(uint32_t data);
 
   PositionsRecorder* positions_recorder() { return &positions_recorder_; }
 
   // Read/patch instructions
   Instr instr_at(int pos) { return *reinterpret_cast<Instr*>(buffer_ + pos); }
+  Instr16 thumb16_instr_at(int pos) {

[rmcilroy_google, 2013/09/17 17:28:16]

thumb2_instr16_at.

+    return *reinterpret_cast<Instr16*>(buffer_ + pos);
+  }
   void instr_at_put(int pos, Instr instr) {
     *reinterpret_cast<Instr*>(buffer_ + pos) = instr;
   }
   static Instr instr_at(byte* pc) { return *reinterpret_cast<Instr*>(pc); }
   static void instr_at_put(byte* pc, Instr instr) {
     *reinterpret_cast<Instr*>(pc) = instr;
   }
   static Condition GetCondition(Instr instr);
   static bool IsBranch(Instr instr);
   static int GetBranchOffset(Instr instr);
@@ skipping 147 matching lines @@
   // be 64-bit.
   int num_pending_64_bit_reloc_info_;
 
   // The bound position, before this we cannot do instruction elimination.
   int last_bound_pos_;
 
   // Code emission
   inline void CheckBuffer();
   void GrowBuffer();
   inline void emit(Instr x);
+  inline void emit16(Instr16 x, bool check_buffer = true);
 
   // 32-bit immediate values
   void move_32_bit_immediate(Condition cond,
                              Register rd,
                              SBit s,
                              const Operand& x);
 
   // Instruction generation
   void addrmod1(Instr instr, Register rn, Register rd, const Operand& x);
   void addrmod2(Instr instr, Register rd, const MemOperand& x);
   void addrmod3(Instr instr, Register rd, const MemOperand& x);
   void addrmod4(Instr instr, Register rn, RegList rl);
   void addrmod5(Instr instr, CRegister crd, const MemOperand& x);
 
+  Instr16 thumb16_mode1(ThumbMode1Opcode16 op);  // A6.2.1 -> mode1

[rmcilroy_google, 2013/09/17 17:28:16]

ditto with thumb16->thumb2 here and below. Also, are these really necessary in
the public header? Maybe they could go in assembler-arm-int.h, or if you end up
splitting thumb into a seperate Assembler class (see comment in
assembler-thumb16.cc) then in assembler-thumb2-int.h.

+  Instr16 thumb16_mode2(ThumbMode2Opcode16 op);  // A6.2.2 -> mode2
+  Instr16 thumb16_mode3(ThumbMode3Opcode16 op);  // A6.2.3 -> mode3
+
+  // A6.2.4 -> mode4, opA 0101 -> _1
+  Instr16 thumb16_mode4_1(ThumbMode4_1Opcode16 opB);
+  // A6.2.4 -> mode4, opA 0110 -> _2
+  Instr16 thumb16_mode4_2(ThumbMode4_2Opcode16 opB);
+  // A6.2.4 -> mode4, opA 0111 -> _3
+  Instr16 thumb16_mode4_3(ThumbMode4_3Opcode16 opB);
+  // A6.2.4 -> mode4, opA 1000 -> _4
+  Instr16 thumb16_mode4_4(ThumbMode4_4Opcode16 opB);
+  // A6.2.4 -> mode4, opA 1001 -> _5
+  Instr16 thumb16_mode4_5(ThumbMode4_5Opcode16 opB);
+
+  Instr16 thumb16_2lowreg_encoding(Register rd,
+                                   const Operand& x);
+  Instr16 thumb16_2lowreg_encoding(Register rd,
+                                   Register rs);
+  Instr16 thumb16_2lowreg_imm3_encoding(Register rd,
+                                        Register rn,
+                                        const Operand& x);
+  Instr16 thumb16_2lowreg_imm5_encoding(Register rd,
+                                        Register rn,
+                                        uint32_t offset);
+  Instr16 thumb16_2lowreg_imm5_encoding(Register rd,
+                                        Register rn,
+                                        const Operand& x);
+  Instr16 thumb16_3lowreg_encoding(Register rd,
+                                   Register rn,
+                                   const Operand& x);
+  Instr16 thumb16_3lowreg_encoding(Register rd,
+                                   const MemOperand& x);
+  Instr16 thumb16_anyreg_encoding(const Operand& x);
+  Instr16 thumb16_anyreg_encoding(Register rm);
+  Instr16 thumb16_2anyreg_encoding(Register rd, const Operand& x);
+  Instr16 thumb16_lowreg_imm8_encoding(Register rd, const Operand& x);
+  Instr16 thumb16_lowreg_imm8_encoding(Register rd, uint32_t offset);
+  static Instr16 thumb16_instr_at(Address addr);
+  void thumb16_instr_at_put(int pos, Instr16 instr);
+  bool fits_thumb16_mode_4(Register reg, const MemOperand& op);
+  bool fits_thumb16_mode_4_1(Register reg, const MemOperand& op);
+  bool fits_thumb16_mode_4_5(Register reg, const MemOperand& op);
+
+  bool is_low_reg(Register reg);
+  bool are_low_reg(Register reg1, Register reg2);
+
   // Labels
   void print(Label* L);
   void bind_to(Label* L, int pos);
   void next(Label* L);
 
   enum UseConstantPoolMode {
     USE_CONSTANT_POOL,
     DONT_USE_CONSTANT_POOL
   };
 
@@ skipping 17 matching lines @@
  public:
   explicit EnsureSpace(Assembler* assembler) {
     assembler->CheckBuffer();
   }
 };
 
 
 } }  // namespace v8::internal
 
 #endif  // V8_ARM_ASSEMBLER_ARM_H_