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1 //===- subzero/src/IceTargetLoweringMIPS32.h - MIPS32 lowering ---*- C++-*-===// | 1 //===- subzero/src/IceTargetLoweringMIPS32.h - MIPS32 lowering ---*- C++-*-===// |
2 // | 2 // |
3 // The Subzero Code Generator | 3 // The Subzero Code Generator |
4 // | 4 // |
5 // This file is distributed under the University of Illinois Open Source | 5 // This file is distributed under the University of Illinois Open Source |
6 // License. See LICENSE.TXT for details. | 6 // License. See LICENSE.TXT for details. |
7 // | 7 // |
8 //===----------------------------------------------------------------------===// | 8 //===----------------------------------------------------------------------===// |
9 /// | 9 /// |
10 /// \file | 10 /// \file |
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257 } | 257 } |
258 | 258 |
259 void _c_un_d(Variable *Src0, Variable *Src1) { | 259 void _c_un_d(Variable *Src0, Variable *Src1) { |
260 Context.insert<InstMIPS32C_un_d>(Src0, Src1); | 260 Context.insert<InstMIPS32C_un_d>(Src0, Src1); |
261 } | 261 } |
262 | 262 |
263 void _c_un_s(Variable *Src0, Variable *Src1) { | 263 void _c_un_s(Variable *Src0, Variable *Src1) { |
264 Context.insert<InstMIPS32C_un_s>(Src0, Src1); | 264 Context.insert<InstMIPS32C_un_s>(Src0, Src1); |
265 } | 265 } |
266 | 266 |
| 267 void _clz(Variable *Dest, Variable *Src) { |
| 268 Context.insert<InstMIPS32Clz>(Dest, Src); |
| 269 } |
| 270 |
267 void _cvt_d_l(Variable *Dest, Variable *Src) { | 271 void _cvt_d_l(Variable *Dest, Variable *Src) { |
268 Context.insert<InstMIPS32Cvt_d_l>(Dest, Src); | 272 Context.insert<InstMIPS32Cvt_d_l>(Dest, Src); |
269 } | 273 } |
270 | 274 |
271 void _cvt_d_s(Variable *Dest, Variable *Src) { | 275 void _cvt_d_s(Variable *Dest, Variable *Src) { |
272 Context.insert<InstMIPS32Cvt_d_s>(Dest, Src); | 276 Context.insert<InstMIPS32Cvt_d_s>(Dest, Src); |
273 } | 277 } |
274 | 278 |
275 void _cvt_d_w(Variable *Dest, Variable *Src) { | 279 void _cvt_d_w(Variable *Dest, Variable *Src) { |
276 Context.insert<InstMIPS32Cvt_d_w>(Dest, Src); | 280 Context.insert<InstMIPS32Cvt_d_w>(Dest, Src); |
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857 explicit TargetHeaderMIPS32(GlobalContext *Ctx); | 861 explicit TargetHeaderMIPS32(GlobalContext *Ctx); |
858 | 862 |
859 private: | 863 private: |
860 ~TargetHeaderMIPS32() = default; | 864 ~TargetHeaderMIPS32() = default; |
861 }; | 865 }; |
862 | 866 |
863 } // end of namespace MIPS32 | 867 } // end of namespace MIPS32 |
864 } // end of namespace Ice | 868 } // end of namespace Ice |
865 | 869 |
866 #endif // SUBZERO_SRC_ICETARGETLOWERINGMIPS32_H | 870 #endif // SUBZERO_SRC_ICETARGETLOWERINGMIPS32_H |
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