Subzero, MIPS32: Intrinsic call Ctlz for i32

src/IceInstMIPS32.cpp

 //===- subzero/src/IceInstMips32.cpp - Mips32 instruction implementation --===//
 //
 //                        The Subzero Code Generator
 //
 // This file is distributed under the University of Illinois Open Source
 // License. See LICENSE.TXT for details.
 //
 //===----------------------------------------------------------------------===//
 //
 /// \file
@@ skipping 65 matching lines @@
 template <> const char *InstMIPS32C_olt_d::Opcode = "c.olt.d";
 template <> const char *InstMIPS32C_olt_s::Opcode = "c.olt.s";
 template <> const char *InstMIPS32C_ueq_d::Opcode = "c.ueq.d";
 template <> const char *InstMIPS32C_ueq_s::Opcode = "c.ueq.s";
 template <> const char *InstMIPS32C_ule_d::Opcode = "c.ule.d";
 template <> const char *InstMIPS32C_ule_s::Opcode = "c.ule.s";
 template <> const char *InstMIPS32C_ult_d::Opcode = "c.ult.d";
 template <> const char *InstMIPS32C_ult_s::Opcode = "c.ult.s";
 template <> const char *InstMIPS32C_un_d::Opcode = "c.un.d";
 template <> const char *InstMIPS32C_un_s::Opcode = "c.un.s";
+template <> const char *InstMIPS32Clz::Opcode = "clz";
 template <> const char *InstMIPS32Cvt_d_l::Opcode = "cvt.d.l";
 template <> const char *InstMIPS32Cvt_d_s::Opcode = "cvt.d.s";
 template <> const char *InstMIPS32Cvt_d_w::Opcode = "cvt.d.w";
 template <> const char *InstMIPS32Cvt_s_d::Opcode = "cvt.s.d";
 template <> const char *InstMIPS32Cvt_s_l::Opcode = "cvt.s.l";
 template <> const char *InstMIPS32Cvt_s_w::Opcode = "cvt.s.w";
 template <> const char *InstMIPS32Div::Opcode = "div";
 template <> const char *InstMIPS32Div_d::Opcode = "div.d";
 template <> const char *InstMIPS32Div_s::Opcode = "div.s";
 template <> const char *InstMIPS32Divu::Opcode = "divu";
@@ skipping 751 matching lines @@
 template <> void InstMIPS32C_un_d::emitIAS(const Cfg *Func) const {
   auto *Asm = Func->getAssembler<MIPS32::AssemblerMIPS32>();
   Asm->c_un_d(getSrc(0), getSrc(1));
 }
 
 template <> void InstMIPS32C_un_s::emitIAS(const Cfg *Func) const {
   auto *Asm = Func->getAssembler<MIPS32::AssemblerMIPS32>();
   Asm->c_un_s(getSrc(0), getSrc(1));
 }
 
+template <> void InstMIPS32Clz::emitIAS(const Cfg *Func) const {
+  auto *Asm = Func->getAssembler<MIPS32::AssemblerMIPS32>();
+  Asm->clz(getDest(), getSrc(0));
+}
+
 template <> void InstMIPS32Cvt_d_l::emitIAS(const Cfg *Func) const {
   auto *Asm = Func->getAssembler<MIPS32::AssemblerMIPS32>();
   Asm->cvt_d_l(getDest(), getSrc(0));
 }
 
 template <> void InstMIPS32Cvt_d_s::emitIAS(const Cfg *Func) const {
   auto *Asm = Func->getAssembler<MIPS32::AssemblerMIPS32>();
   Asm->cvt_d_s(getDest(), getSrc(0));
 }
 
@@ skipping 60 matching lines @@
 template <> void InstMIPS32Mov_s::emitIAS(const Cfg *Func) const {
   auto *Asm = Func->getAssembler<MIPS32::AssemblerMIPS32>();
   Asm->mov_s(getDest(), getSrc(0));
 }
 
 template <> void InstMIPS32Movf::emitIAS(const Cfg *Func) const {
   auto *Asm = Func->getAssembler<MIPS32::AssemblerMIPS32>();
   Asm->movf(getDest(), getSrc(1), getSrc(2));
 }
 
+template <> void InstMIPS32Movn::emitIAS(const Cfg *Func) const {
+  auto *Asm = Func->getAssembler<MIPS32::AssemblerMIPS32>();
+  Asm->movn(getDest(), getSrc(0), getSrc(1));
+}
+
 template <> void InstMIPS32Movn_d::emitIAS(const Cfg *Func) const {
   auto *Asm = Func->getAssembler<MIPS32::AssemblerMIPS32>();
   Asm->movn_d(getDest(), getSrc(0), getSrc(1));
 }
 
 template <> void InstMIPS32Movn_s::emitIAS(const Cfg *Func) const {
   auto *Asm = Func->getAssembler<MIPS32::AssemblerMIPS32>();
   Asm->movn_s(getDest(), getSrc(0), getSrc(1));
 }
 
@@ skipping 159 matching lines @@
   Asm->xor_(getDest(), getSrc(0), getSrc(1));
 }
 
 template <> void InstMIPS32Xori::emitIAS(const Cfg *Func) const {
   auto *Asm = Func->getAssembler<MIPS32::AssemblerMIPS32>();
   Asm->xori(getDest(), getSrc(0), Imm);
 }
 
 } // end of namespace MIPS32
 } // end of namespace Ice