Thumb2 Backend: Enable Assembler to encode Thumb2 instructions

src/arm/assembler-thumb.cc

 // Copyright 2013 the V8 project authors. All rights reserved.
 // Redistribution and use in source and binary forms, with or without
 // modification, are permitted provided that the following conditions are
 // met:
 //
 //     * Redistributions of source code must retain the above copyright
 //       notice, this list of conditions and the following disclaimer.
 //     * Redistributions in binary form must reproduce the above
 //       copyright notice, this list of conditions and the following
 //       disclaimer in the documentation and/or other materials provided
@@ skipping 712 matching lines @@
     uint32_t j2 = (imm >> 18) & 1;
     uint32_t s = (imm >> 19) & 1;
     emit32(thumb32_mode4(B_32_3) | s*BH10 | cond_thumb*BH6 |
            imm6*BH0 | j1*B13 | j2*B11 | imm11);
     return;
   }
   UNREACHABLE();
 }
 
 
+int Assembler::target_at_thumb(int pos)  {
+  Instr16 tinstr = thumb16_instr_at(pos);
+  if (((tinstr >> 12) & 0xf) == 13) {
+    int imm9 = (tinstr << 24) >> 23;
+    ASSERT(is_int9(imm9));
+    return pos + kThumbPcLoadDelta + imm9;
+  } else if (((tinstr >> 11) & 0x1f) == 28) {
+    int imm12 = (tinstr << 21) >> 20;
+    ASSERT(is_int12(imm12));
+    return pos + kThumbPcLoadDelta + imm12;
+  }
+  Instr tinstr32 = thumb32_instr_at(pos);
+  if ((tinstr32 & B12) == 0) {
+    int s = (tinstr32 & BH10) >> 7;
+    int j2 = (tinstr32 & B11) << 7;
+    int j1 = (tinstr32 & B13) << 4;
+    int imm6 = (tinstr32 & (0x3f * BH0)) >> 5;
+    int imm11 = tinstr32 & 0x7ff;
+    int imm20 = (s | j2 | j1 | imm6 | imm11);
+    int imm21 = (imm20 << 12) >> 11;
+    ASSERT(is_int21(imm21));
+    return pos + kThumbPcLoadDelta + imm21;
+  } else {
+    int s = (tinstr32 & BH10) >> 26;
+    int j2 = (tinstr32 & B11) >> 11;
+    int j1 = (tinstr32 & B13) >> 13;
+    int imm10 = (tinstr32 & (0x3ff * BH0)) >> 5;
+    int imm11 = tinstr32 & 0x7ff;
+    int i1 = !(j1 ^ s);
+    int i2 = !(j2 ^ s);
+    int imm24 = (s*B23 | i1*B22 | i2*B21 | imm10 | imm11);
+    int imm25 = (imm24 << 8) >> 7;
+    return pos + kThumbPcLoadDelta + imm25;
+  }
+  UNREACHABLE();
+  return 0;
+}
+
+
+void Assembler::target_at_put_thumb(int pos, int target_pos) {
+  int imm = (target_pos - (pos + kThumbPcLoadDelta)) >> 1;
+  Instr16 tinstr = thumb16_instr_at(pos);
+  if (((tinstr >> 12) & 0xf) == 13) {
+    ASSERT(is_int8(imm));
+    tinstr &= ~0xff;
+    thumb16_instr_at_put(pos, tinstr | (imm & 0xff));
+    return;
+  } else if (((tinstr >> 11) & 0x1f) == 28) {
+    ASSERT(is_int11(imm));
+    tinstr &= ~0x7ff;
+    thumb16_instr_at_put(pos, tinstr | (imm & 0x7ff));
+    return;
+  }
+
+  Instr tinstr32 = thumb32_instr_at(pos);
+  if ((tinstr32 & B12) == 0) {
+    tinstr32 &= ~(BH10 | (0x3f*BH0) | B13 | B11 | 0x7ff);
+    ASSERT(is_int20(imm));
+    uint32_t imm11 = imm & 0x7ff;
+    uint32_t imm6 = (imm >> 11) & 0x3f;
+    uint32_t j1 = (imm >> 17) & 1;
+    uint32_t j2 = (imm >> 18) & 1;
+    uint32_t s = (imm >> 19) & 1;
+    tinstr32 |= s*BH10 | imm6*BH0 | j1*B13 | j2*B11 | imm11;
+    thumb32_instr_at_put(pos, tinstr32);
+    return;
+  } else {
+    ASSERT(is_int24(imm));
+    tinstr32 &= ~(BH10 | (0x3ff*BH0) | B13 | B11 | 0x7ff);
+    tinstr32 |= thumb32_sign_extend_imm24(imm);
+    thumb32_instr_at_put(pos, tinstr32);
+  }
+}
+
+
 // from ldr_thumb_reg
 bool Assembler::fits_thumb16_mode_4_1(Register reg, const MemOperand& op) {
   return (is_uint3(op.rm().code()) &&
           is_uint3(op.rn().code()) &&
           is_uint3(reg.code()) &&
           op.shift_imm_ == 0);
 }
 
 
 // other than 4_1 and 4_5
@@ skipping 528 matching lines @@
 
 
 void Assembler::ldr_pc_thumb(Register dst, const Operand& src) {
   RecordRelocInfo(src.rmode_, src.imm32_, USE_CONSTANT_POOL);
   ldr_thumb(dst, MemOperand(pc, 0));
 }
 
 } }  // namespace v8::internal
 
 #endif  // V8_TARGET_ARCH_ARM