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Side by Side Diff: src/arm/assembler-arm.h

Issue 23536056: Thumb2 Backend: Enable Assembler to encode Thumb2 instructions Base URL: HEAD^
Patch Set: Created 7 years, 2 months ago
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1 // Copyright (c) 1994-2006 Sun Microsystems Inc. 1 // Copyright (c) 1994-2006 Sun Microsystems Inc.
2 // All Rights Reserved. 2 // All Rights Reserved.
3 // 3 //
4 // Redistribution and use in source and binary forms, with or without 4 // Redistribution and use in source and binary forms, with or without
5 // modification, are permitted provided that the following conditions 5 // modification, are permitted provided that the following conditions
6 // are met: 6 // are met:
7 // 7 //
8 // - Redistributions of source code must retain the above copyright notice, 8 // - Redistributions of source code must retain the above copyright notice,
9 // this list of conditions and the following disclaimer. 9 // this list of conditions and the following disclaimer.
10 // 10 //
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690 extern const Instr kMovwMask; 690 extern const Instr kMovwMask;
691 extern const Instr kMovwPattern; 691 extern const Instr kMovwPattern;
692 extern const Instr kMovwLeaveCCFlip; 692 extern const Instr kMovwLeaveCCFlip;
693 693
694 extern const Instr kCmpCmnMask; 694 extern const Instr kCmpCmnMask;
695 extern const Instr kCmpCmnPattern; 695 extern const Instr kCmpCmnPattern;
696 extern const Instr kCmpCmnFlip; 696 extern const Instr kCmpCmnFlip;
697 extern const Instr kAddSubFlip; 697 extern const Instr kAddSubFlip;
698 extern const Instr kAndBicFlip; 698 extern const Instr kAndBicFlip;
699 699
700 extern const Instr kThumbLdrPCMask;
701 extern const Instr kThumbLdrPCPattern;
702
700 struct VmovIndex { 703 struct VmovIndex {
701 unsigned char index; 704 unsigned char index;
702 }; 705 };
703 const VmovIndex VmovIndexLo = { 0 }; 706 const VmovIndex VmovIndexLo = { 0 };
704 const VmovIndex VmovIndexHi = { 1 }; 707 const VmovIndex VmovIndexHi = { 1 };
705 708
706 class Assembler : public AssemblerBase { 709 class Assembler : public AssemblerBase {
707 public: 710 public:
708 // Create an assembler. Instructions and relocation information are emitted 711 // Create an assembler. Instructions and relocation information are emitted
709 // into a buffer, with the instructions starting from the beginning and the 712 // into a buffer, with the instructions starting from the beginning and the
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799 // Patched debug break slot code is: 802 // Patched debug break slot code is:
800 // ldr ip, [pc, #0] @ emited address and start 803 // ldr ip, [pc, #0] @ emited address and start
801 // blx ip 804 // blx ip
802 static const int kPatchDebugBreakSlotAddressOffset = 0 * kInstrSize; 805 static const int kPatchDebugBreakSlotAddressOffset = 0 * kInstrSize;
803 806
804 static const int kPatchDebugBreakSlotReturnOffset = 2 * kInstrSize; 807 static const int kPatchDebugBreakSlotReturnOffset = 2 * kInstrSize;
805 808
806 // Difference between address of current opcode and value read from pc 809 // Difference between address of current opcode and value read from pc
807 // register. 810 // register.
808 static const int kPcLoadDelta = 8; 811 static const int kPcLoadDelta = 8;
812 static const int kThumbPcLoadDelta = 4;
809 813
810 static const int kJSReturnSequenceInstructions = 4; 814 static const int kJSReturnSequenceInstructions = 4;
811 static const int kDebugBreakSlotInstructions = 3; 815 static const int kDebugBreakSlotInstructions = 3;
812 static const int kDebugBreakSlotLength = 816 static const int kDebugBreakSlotLength =
813 kDebugBreakSlotInstructions * kInstrSize; 817 kDebugBreakSlotInstructions * kInstrSize;
814 818
815 // --------------------------------------------------------------------------- 819 // ---------------------------------------------------------------------------
816 // Code generation 820 // Code generation
817 821
818 // Insert the smallest number of nop instructions 822 // Insert the smallest number of nop instructions
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1571 static bool IsLdrPcImmediateOffset(Instr instr); 1575 static bool IsLdrPcImmediateOffset(Instr instr);
1572 static bool IsVldrDPcImmediateOffset(Instr instr); 1576 static bool IsVldrDPcImmediateOffset(Instr instr);
1573 static bool IsTstImmediate(Instr instr); 1577 static bool IsTstImmediate(Instr instr);
1574 static bool IsCmpRegister(Instr instr); 1578 static bool IsCmpRegister(Instr instr);
1575 static bool IsCmpImmediate(Instr instr); 1579 static bool IsCmpImmediate(Instr instr);
1576 static Register GetCmpImmediateRegister(Instr instr); 1580 static Register GetCmpImmediateRegister(Instr instr);
1577 static int GetCmpImmediateRawImmediate(Instr instr); 1581 static int GetCmpImmediateRawImmediate(Instr instr);
1578 static bool IsNop(Instr instr, int type = NON_MARKING_NOP); 1582 static bool IsNop(Instr instr, int type = NON_MARKING_NOP);
1579 static bool IsMovT(Instr instr); 1583 static bool IsMovT(Instr instr);
1580 static bool IsMovW(Instr instr); 1584 static bool IsMovW(Instr instr);
1585 static bool IsMovTThumb(Instr instr);
1586 static bool IsMovWThumb(Instr instr);
1581 1587
1582 // Constants in pools are accessed via pc relative addressing, which can 1588 // Constants in pools are accessed via pc relative addressing, which can
1583 // reach +/-4KB for integer PC-relative loads and +/-1KB for floating-point 1589 // reach +/-4KB for integer PC-relative loads and +/-1KB for floating-point
1584 // PC-relative loads, thereby defining a maximum distance between the 1590 // PC-relative loads, thereby defining a maximum distance between the
1585 // instruction and the accessed constant. 1591 // instruction and the accessed constant.
1586 static const int kMaxDistToIntPool = 4*KB; 1592 static const int kMaxDistToIntPool = 4*KB;
1587 static const int kMaxDistToFPPool = 1*KB; 1593 static const int kMaxDistToFPPool = 1*KB;
1588 // All relocations could be integer, it therefore acts as the limit. 1594 // All relocations could be integer, it therefore acts as the limit.
1589 static const int kMaxNumPendingRelocInfo = kMaxDistToIntPool/kInstrSize; 1595 static const int kMaxNumPendingRelocInfo = kMaxDistToIntPool/kInstrSize;
1590 1596
1591 // Postpone the generation of the constant pool for the specified number of 1597 // Postpone the generation of the constant pool for the specified number of
1592 // instructions. 1598 // instructions.
1593 void BlockConstPoolFor(int instructions); 1599 void BlockConstPoolFor(int instructions);
1594 1600
1595 // Check if is time to emit a constant pool. 1601 // Check if is time to emit a constant pool.
1596 void CheckConstPool(bool force_emit, bool require_jump); 1602 void CheckConstPool(bool force_emit, bool require_jump);
1597 1603
1604 void set_thumb_mode() { thumb_mode_ = true; }
1605 void set_arm_mode() { thumb_mode_ = false; }
1606
1607 bool is_thumb_mode() {return thumb_mode_; }
1608
1598 protected: 1609 protected:
1599 // Relocation for a type-recording IC has the AST id added to it. This 1610 // Relocation for a type-recording IC has the AST id added to it. This
1600 // member variable is a way to pass the information from the call site to 1611 // member variable is a way to pass the information from the call site to
1601 // the relocation info. 1612 // the relocation info.
1602 TypeFeedbackId recorded_ast_id_; 1613 TypeFeedbackId recorded_ast_id_;
1603 1614
1604 int buffer_space() const { return reloc_info_writer.pos() - pc_; } 1615 int buffer_space() const { return reloc_info_writer.pos() - pc_; }
1605 1616
1606 // Decode branch instruction at pos and return branch target pos 1617 // Decode branch instruction at pos and return branch target pos
1607 int target_at(int pos); 1618 int target_at(int pos);
1619 int target_at_thumb(int pos);
1608 1620
1609 // Patch branch instruction at pos to branch to given branch target pos 1621 // Patch branch instruction at pos to branch to given branch target pos
1610 void target_at_put(int pos, int target_pos); 1622 void target_at_put(int pos, int target_pos);
1623 void target_at_put_thumb(int pos, int target_pos);
1611 1624
1612 // Prevent contant pool emission until EndBlockConstPool is called. 1625 // Prevent contant pool emission until EndBlockConstPool is called.
1613 // Call to this function can be nested but must be followed by an equal 1626 // Call to this function can be nested but must be followed by an equal
1614 // number of call to EndBlockConstpool. 1627 // number of call to EndBlockConstpool.
1615 void StartBlockConstPool() { 1628 void StartBlockConstPool() {
1616 if (const_pool_blocked_nesting_++ == 0) { 1629 if (const_pool_blocked_nesting_++ == 0) {
1617 // Prevent constant pool checks happening by setting the next check to 1630 // Prevent constant pool checks happening by setting the next check to
1618 // the biggest possible offset. 1631 // the biggest possible offset.
1619 next_buffer_check_ = kMaxInt; 1632 next_buffer_check_ = kMaxInt;
1620 } 1633 }
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1844 void RecordRelocInfo(double data); 1857 void RecordRelocInfo(double data);
1845 void RecordRelocInfoConstantPoolEntryHelper(const RelocInfo& rinfo); 1858 void RecordRelocInfoConstantPoolEntryHelper(const RelocInfo& rinfo);
1846 1859
1847 friend class RelocInfo; 1860 friend class RelocInfo;
1848 friend class CodePatcher; 1861 friend class CodePatcher;
1849 friend class BlockConstPoolScope; 1862 friend class BlockConstPoolScope;
1850 1863
1851 PositionsRecorder positions_recorder_; 1864 PositionsRecorder positions_recorder_;
1852 friend class PositionsRecorder; 1865 friend class PositionsRecorder;
1853 friend class EnsureSpace; 1866 friend class EnsureSpace;
1867
1868 bool thumb_mode_;
1854 }; 1869 };
1855 1870
1856 1871
1857 class EnsureSpace BASE_EMBEDDED { 1872 class EnsureSpace BASE_EMBEDDED {
1858 public: 1873 public:
1859 explicit EnsureSpace(Assembler* assembler) { 1874 explicit EnsureSpace(Assembler* assembler) {
1860 assembler->CheckBuffer(); 1875 assembler->CheckBuffer();
1861 } 1876 }
1862 }; 1877 };
1863 1878
1864 1879
1865 } } // namespace v8::internal 1880 } } // namespace v8::internal
1866 1881
1867 #endif // V8_ARM_ASSEMBLER_ARM_H_ 1882 #endif // V8_ARM_ASSEMBLER_ARM_H_
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