Thumb2 Backend: Branch, load, store, misc. instruction encoding methods

src/arm/assembler-arm.cc

Index: src/arm/assembler-arm.cc
diff --git a/src/arm/assembler-arm.cc b/src/arm/assembler-arm.cc
index bd8b0613eb9bea99a87c3f549b12069cbd8c858a..fc33b660011afc7731c5136a4d9a7720bd96353f 100644
--- a/src/arm/assembler-arm.cc
+++ b/src/arm/assembler-arm.cc
@@ -1088,6 +1088,32 @@ bool Operand::is_single_instruction(const Assembler* assembler,
 }
 
 
+void Assembler::move_32_bit_immediate_thumb(Register rd,
+                                            SBit s,
+                                            const Operand& x,
+                                            Condition cond) {
+  if (rd.code() != pc.code() && s == LeaveCC) {
+    if (use_movw_movt(x, this)) {
+      if (x.must_output_reloc_info(this)) {
+        RecordRelocInfo(x.rmode_, x.imm32_, DONT_USE_CONSTANT_POOL);
+        // Make sure the movw/movt doesn't get separated.
+        BlockConstPoolFor(2);
+      }
+      if (cond != al) {
+        pc_ -= kInstr16Size;
+        it_thumb(cond, 2, true);
+      }
+      emit32(thumb32_mode3(MOV_32_IMM3) |
+             thumb32_1reg_zero_extend_imm_split_4i38(rd, (x.imm32_ &  0xffff)));
+      movt_thumb(rd, static_cast<uint32_t>(x.imm32_) >> 16, al);
+      return;
+    }
+  }
+  RecordRelocInfo(x.rmode_, x.imm32_, USE_CONSTANT_POOL);
+  ldr_thumb(rd, MemOperand(pc, 0));
+}
+
+
 void Assembler::move_32_bit_immediate(Condition cond,
                                       Register rd,
                                       SBit s,