Thumb2 Backend: Branch, load, store, misc. instruction encoding methods

src/arm/assembler-arm.cc

 // Copyright (c) 1994-2006 Sun Microsystems Inc.
 // All Rights Reserved.
 //
 // Redistribution and use in source and binary forms, with or without
 // modification, are permitted provided that the following conditions
 // are met:
 //
 // - Redistributions of source code must retain the above copyright notice,
 // this list of conditions and the following disclaimer.
 //
@@ skipping 1070 matching lines @@
       return false;
     }
   } else {
     // No use of constant pool and the immediate operand can be encoded as a
     // shifter operand.
     return true;
   }
 }
 
 
+void Assembler::move_32_bit_immediate_thumb(Register rd,
+                                            SBit s,
+                                            const Operand& x,
+                                            Condition cond) {
+  if (rd.code() != pc.code() && s == LeaveCC) {
+    if (use_movw_movt(x, this)) {
+      if (x.must_output_reloc_info(this)) {
+        RecordRelocInfo(x.rmode_, x.imm32_, DONT_USE_CONSTANT_POOL);
+        // Make sure the movw/movt doesn't get separated.
+        BlockConstPoolFor(2);
+      }
+      if (cond != al) {
+        pc_ -= kInstr16Size;
+        it_thumb(cond, 2, true);
+      }
+      emit32(thumb32_mode3(MOV_32_IMM3) |
+             thumb32_1reg_zero_extend_imm_split_4i38(rd, (x.imm32_ &  0xffff)));
+      movt_thumb(rd, static_cast<uint32_t>(x.imm32_) >> 16, al);
+      return;
+    }
+  }
+  RecordRelocInfo(x.rmode_, x.imm32_, USE_CONSTANT_POOL);
+  ldr_thumb(rd, MemOperand(pc, 0));
+}
+
+
 void Assembler::move_32_bit_immediate(Condition cond,
                                       Register rd,
                                       SBit s,
                                       const Operand& x) {
   if (rd.code() != pc.code() && s == LeaveCC) {
     if (use_movw_movt(x, this)) {
       if (x.must_output_reloc_info(this)) {
         RecordRelocInfo(x.rmode_, x.imm32_, DONT_USE_CONSTANT_POOL);
         // Make sure the movw/movt doesn't get separated.
         BlockConstPoolFor(2);
@@ skipping 2336 matching lines @@
 
   // Since a constant pool was just emitted, move the check offset forward by
   // the standard interval.
   next_buffer_check_ = pc_offset() + kCheckPoolInterval;
 }
 
 
 } }  // namespace v8::internal
 
 #endif  // V8_TARGET_ARCH_ARM