[SubZero] lower float and double constants for MIPS

tests_lit/llvm2ice_tests/fp_const_pool.ll

Index: tests_lit/llvm2ice_tests/fp_const_pool.ll
diff --git a/tests_lit/llvm2ice_tests/fp_const_pool.ll b/tests_lit/llvm2ice_tests/fp_const_pool.ll
index 587e96719cd6c9e7206bd5172ae30dc1c2718d68..8c9bfec286f496985e721d2a717bba71e88f68df 100644
--- a/tests_lit/llvm2ice_tests/fp_const_pool.ll
+++ b/tests_lit/llvm2ice_tests/fp_const_pool.ll
@@ -5,6 +5,12 @@
 
 ; REQUIRES: allow_dump
 
+; RUN: %if --need=target_MIPS32 --need=allow_dump \
+; RUN:   --command %p2i --filetype=asm --assemble --disassemble \
+; RUN:   --target mips32 -i %s --args -O2 --skip-unimplemented \
+; RUN:   | %if --need=target_MIPS32 --need=allow_dump \
+; RUN:   --command FileCheck --check-prefix MIPS32 %s
+
 define internal void @consume_float(float %f) {
   ret void
 }
@@ -21,6 +27,17 @@ entry:
   call void @consume_double(double -0.0)
   ret void
 }
+
+; MIPS32-LABEL: test_zeros
+; MIPS32: lui [[REG:.*]],{{.*}}: R_MIPS_HI16 .L$float$00000000
+; MIPS32: lwc1 {{.*}},0([[REG]]) {{.*}}: R_MIPS_LO16 .L$float$00000000
+; MIPS32: lui [[REG:.*]],{{.*}}: R_MIPS_HI16 .L$float$80000000
+; MIPS32: lwc1 {{.*}},0([[REG]]) {{.*}}: R_MIPS_LO16 .L$float$80000000
+; MIPS32: lui [[REG:.*]],{{.*}}: R_MIPS_HI16 .L$double$0000000000000000
+; MIPS32: ldc1 {{.*}},0([[REG]]) {{.*}}: R_MIPS_LO16 .L$double$0000000000000000
+; MIPS32: lui [[REG:.*]],{{.*}}: R_MIPS_HI16 .L$double$8000000000000000
+; MIPS32: ldc1 {{.*}},0([[REG]]) {{.*}}: R_MIPS_LO16 .L$double$8000000000000000
+
 ; Parse the function, dump the bitcode back out, and stop without translating.
 ; This tests that +0.0 and -0.0 aren't accidentally merged into a single
 ; zero-valued constant pool entry.
@@ -46,6 +63,26 @@ entry:
   call void @consume_double(double 0xFFF8000000000000)
   ret void
 }
+
+; MIPS32-LABEL: test_nans
+; MIPS32: lui [[REG:.*]],{{.*}}: R_MIPS_HI16 .L$float$7fc00000
+; MIPS32: lwc1 {{.*}},0([[REG]]) {{.*}}: R_MIPS_LO16 .L$float$7fc00000
+; MIPS32: lui [[REG:.*]],{{.*}}: R_MIPS_HI16 .L$float$7fc00000
+; MIPS32: lwc1 {{.*}},0([[REG]]) {{.*}}: R_MIPS_LO16 .L$float$7fc00000
+; MIPS32: lui [[REG:.*]],{{.*}}: R_MIPS_HI16 .L$float$ffc00000
+; MIPS32: lwc1 {{.*}},0([[REG]]) {{.*}}: R_MIPS_LO16 .L$float$ffc00000
+; MIPS32: lui [[REG:.*]],{{.*}}: R_MIPS_HI16 .L$float$ffc00000
+; MIPS32: lwc1 {{.*}},0([[REG]]) {{.*}}: R_MIPS_LO16 .L$float$ffc00000
+; MIPS32: lui [[REG:.*]],{{.*}}: R_MIPS_HI16 .L$double$7ff8000000000000
+; MIPS32: ldc1 {{.*}},0([[REG]]) {{.*}}: R_MIPS_LO16 .L$double$7ff8000000000000
+; MIPS32: lui [[REG:.*]],{{.*}}: R_MIPS_HI16 .L$double$7ff8000000000000
+; MIPS32: ldc1 {{.*}},0([[REG]]) {{.*}}: R_MIPS_LO16 .L$double$7ff8000000000000
+; MIPS32: lui [[REG:.*]],{{.*}}: R_MIPS_HI16 .L$double$fff8000000000000
+; MIPS32: ldc1 {{.*}},0([[REG]]) {{.*}}: R_MIPS_LO16 .L$double$fff8000000000000
+; MIPS32: lui [[REG:.*]],{{.*}}: R_MIPS_HI16 .L$double$fff8000000000000
+; MIPS32: ldc1 {{.*}},0([[REG]]) {{.*}}: R_MIPS_LO16 .L$double$fff8000000000000
+; MIPS32: jr ra
+
 ; The following tests check the emitted constant pool entries and make sure
 ; there is at most one entry for each NaN value.  We have to run a separate test
 ; for each NaN because the constant pool entries may be emitted in any order.
@@ -69,3 +106,30 @@ entry:
 ; RUN:   | FileCheck --check-prefix=NANS4 %s
 ; NANS4: double -nan
 ; NANS4-NOT: double -nan
+
+; MIPS32 constant pool
+; RUN: %if --need=target_MIPS32 --command %p2i \
+; RUN:   --target mips32 -i %s --filetype=asm --llvm-source \
+; RUN:   --args -O2 --skip-unimplemented \
+; RUN:   | %if --need=target_MIPS32 --command FileCheck \
+; RUN:   --check-prefix=MIPS32CP %s
+; MIPS32CP-LABEL: .L$float$00000000
+; MIPS32CP: .word 0x0 /* f32 0.000000e+00 */
+; MIPS32CP-LABEL: .L$float$7fc00000:
+; MIPS32CP: .word 0x7fc00000 /* f32 nan */
+; MIPS32CP-LABEL: .L$float$80000000
+; MIPS32CP: .word 0x80000000 /* f32 -0.000000e+00 */
+; MIPS32CP-LABEL: .L$float$ffc00000
+; MIPS32CP: .word 0xffc00000 /* f32 -nan */
+; MIPS32CP-LABEL: .L$double$0000000000000000
+; MIPS32CP: .word 0x0
+; MIPS32CP: .word 0x0 /* f64 0.000000e+00 */
+; MIPS32CP-LABEL: .L$double$7ff8000000000000
+; MIPS32CP: .word 0x7ff80000
+; MIPS32CP: .word 0x0 /* f64 nan */
+; MIPS32CP-LABEL: .L$double$8000000000000000
+; MIPS32CP: .word 0x80000000
+; MIPS32CP: .word 0x0 /* f64 -0.000000e+00 */
+; MIPS32CP-LABEL: .L$double$fff8000000000000
+; MIPS32CP: .word 0xfff80000
+; MIPS32CP: .word 0x0 /* f64 -nan */