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| 1 //===- subzero/src/IceAssemblerMIPS32.h - Assembler for MIPS ----*- C++ -*-===// | 1 //===- subzero/src/IceAssemblerMIPS32.h - Assembler for MIPS ----*- C++ -*-===// |
| 2 // | 2 // |
| 3 // The Subzero Code Generator | 3 // The Subzero Code Generator |
| 4 // | 4 // |
| 5 // This file is distributed under the University of Illinois Open Source | 5 // This file is distributed under the University of Illinois Open Source |
| 6 // License. See LICENSE.TXT for details. | 6 // License. See LICENSE.TXT for details. |
| 7 // | 7 // |
| 8 //===----------------------------------------------------------------------===// | 8 //===----------------------------------------------------------------------===// |
| 9 /// | 9 /// |
| 10 /// \file | 10 /// \file |
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| 171 void sra(const Operand *OpRd, const Operand *OpRt, const uint32_t Sa); | 171 void sra(const Operand *OpRd, const Operand *OpRt, const uint32_t Sa); |
| 172 | 172 |
| 173 void srl(const Operand *OpRd, const Operand *OpRt, const uint32_t Sa); | 173 void srl(const Operand *OpRd, const Operand *OpRt, const uint32_t Sa); |
| 174 | 174 |
| 175 void sub_d(const Operand *OpFd, const Operand *OpFs, const Operand *OpFt); | 175 void sub_d(const Operand *OpFd, const Operand *OpFs, const Operand *OpFt); |
| 176 | 176 |
| 177 void sub_s(const Operand *OpFd, const Operand *OpFs, const Operand *OpFt); | 177 void sub_s(const Operand *OpFd, const Operand *OpFs, const Operand *OpFt); |
| 178 | 178 |
| 179 void sw(const Operand *OpRt, const Operand *OpBase, const uint32_t Offset); | 179 void sw(const Operand *OpRt, const Operand *OpBase, const uint32_t Offset); |
| 180 | 180 |
| 181 void teq(const Operand *OpRs, const Operand *OpRt, const uint32_t TrapCode); |
| 182 |
| 181 void trunc_l_d(const Operand *OpFd, const Operand *OpFs); | 183 void trunc_l_d(const Operand *OpFd, const Operand *OpFs); |
| 182 | 184 |
| 183 void trunc_l_s(const Operand *OpFd, const Operand *OpFs); | 185 void trunc_l_s(const Operand *OpFd, const Operand *OpFs); |
| 184 | 186 |
| 185 void trunc_w_d(const Operand *OpFd, const Operand *OpFs); | 187 void trunc_w_d(const Operand *OpFd, const Operand *OpFs); |
| 186 | 188 |
| 187 void trunc_w_s(const Operand *OpFd, const Operand *OpFs); | 189 void trunc_w_s(const Operand *OpFd, const Operand *OpFs); |
| 188 | 190 |
| 189 void xor_(const Operand *OpRd, const Operand *OpRs, const Operand *OpRt); | 191 void xor_(const Operand *OpRd, const Operand *OpRs, const Operand *OpRt); |
| 190 | 192 |
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| 258 void emitInst(IValueT Value) { | 260 void emitInst(IValueT Value) { |
| 259 AssemblerBuffer::EnsureCapacity _(&Buffer); | 261 AssemblerBuffer::EnsureCapacity _(&Buffer); |
| 260 Buffer.emit<IValueT>(Value); | 262 Buffer.emit<IValueT>(Value); |
| 261 } | 263 } |
| 262 }; | 264 }; |
| 263 | 265 |
| 264 } // end of namespace MIPS32 | 266 } // end of namespace MIPS32 |
| 265 } // end of namespace Ice | 267 } // end of namespace Ice |
| 266 | 268 |
| 267 #endif // SUBZERO_SRC_ICEASSEMBLERMIPS32_H | 269 #endif // SUBZERO_SRC_ICEASSEMBLERMIPS32_H |
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