Chromium Code Reviews| OLD | NEW |
|---|---|
| 1 // | 1 // |
| 2 // The Subzero Code Generator | 2 // The Subzero Code Generator |
| 3 // | 3 // |
| 4 // This file is distributed under the University of Illinois Open Source | 4 // This file is distributed under the University of Illinois Open Source |
| 5 // License. See LICENSE.TXT for details. | 5 // License. See LICENSE.TXT for details. |
| 6 // | 6 // |
| 7 //===----------------------------------------------------------------------===// | 7 //===----------------------------------------------------------------------===// |
| 8 /// | 8 /// |
| 9 /// \file | 9 /// \file |
| 10 /// \brief Implements the TargetLoweringMIPS32 class, which consists almost | 10 /// \brief Implements the TargetLoweringMIPS32 class, which consists almost |
| (...skipping 3341 matching lines...) Expand 10 before | Expand all | Expand 10 after Loading... | |
| 3352 Value = legalizeToReg(Value); | 3352 Value = legalizeToReg(Value); |
| 3353 _br(NoTargetFalse, TargetTrue, SrcVar, Value, CondMIPS32::Cond::EQ); | 3353 _br(NoTargetFalse, TargetTrue, SrcVar, Value, CondMIPS32::Cond::EQ); |
| 3354 } | 3354 } |
| 3355 _br(Instr->getLabelDefault()); | 3355 _br(Instr->getLabelDefault()); |
| 3356 } | 3356 } |
| 3357 | 3357 |
| 3358 void TargetMIPS32::lowerBreakpoint(const InstBreakpoint *Instr) { | 3358 void TargetMIPS32::lowerBreakpoint(const InstBreakpoint *Instr) { |
| 3359 UnimplementedLoweringError(this, Instr); | 3359 UnimplementedLoweringError(this, Instr); |
| 3360 } | 3360 } |
| 3361 | 3361 |
| 3362 void TargetMIPS32::lowerUnreachable(const InstUnreachable *Instr) { | 3362 void TargetMIPS32::lowerUnreachable(const InstUnreachable * /*Instr*/) { |
|
Jim Stichnoth
2016/09/19 23:56:38
I would probably just remove the Instr name:
void
obucinac
2016/09/20 13:06:02
Done.
| |
| 3363 UnimplementedLoweringError(this, Instr); | 3363 _teq(getZero(), getZero(), 0); |
|
Jim Stichnoth
2016/09/19 23:56:38
Can you "document" the 0?
constexpr uint32_t Trap
obucinac
2016/09/20 13:06:02
Done.
| |
| 3364 } | 3364 } |
| 3365 | 3365 |
| 3366 // Turn an i64 Phi instruction into a pair of i32 Phi instructions, to preserve | 3366 // Turn an i64 Phi instruction into a pair of i32 Phi instructions, to preserve |
| 3367 // integrity of liveness analysis. Undef values are also turned into zeroes, | 3367 // integrity of liveness analysis. Undef values are also turned into zeroes, |
| 3368 // since loOperand() and hiOperand() don't expect Undef input. | 3368 // since loOperand() and hiOperand() don't expect Undef input. |
| 3369 void TargetMIPS32::prelowerPhis() { | 3369 void TargetMIPS32::prelowerPhis() { |
| 3370 PhiLowering::prelowerPhis32Bit<TargetMIPS32>(this, Context.getNode(), Func); | 3370 PhiLowering::prelowerPhis32Bit<TargetMIPS32>(this, Context.getNode(), Func); |
| 3371 } | 3371 } |
| 3372 | 3372 |
| 3373 void TargetMIPS32::postLower() { | 3373 void TargetMIPS32::postLower() { |
| (...skipping 293 matching lines...) Expand 10 before | Expand all | Expand 10 after Loading... | |
| 3667 Str << "\t.set\t" | 3667 Str << "\t.set\t" |
| 3668 << "nomips16\n"; | 3668 << "nomips16\n"; |
| 3669 } | 3669 } |
| 3670 | 3670 |
| 3671 SmallBitVector TargetMIPS32::TypeToRegisterSet[RCMIPS32_NUM]; | 3671 SmallBitVector TargetMIPS32::TypeToRegisterSet[RCMIPS32_NUM]; |
| 3672 SmallBitVector TargetMIPS32::TypeToRegisterSetUnfiltered[RCMIPS32_NUM]; | 3672 SmallBitVector TargetMIPS32::TypeToRegisterSetUnfiltered[RCMIPS32_NUM]; |
| 3673 SmallBitVector TargetMIPS32::RegisterAliases[RegMIPS32::Reg_NUM]; | 3673 SmallBitVector TargetMIPS32::RegisterAliases[RegMIPS32::Reg_NUM]; |
| 3674 | 3674 |
| 3675 } // end of namespace MIPS32 | 3675 } // end of namespace MIPS32 |
| 3676 } // end of namespace Ice | 3676 } // end of namespace Ice |
| OLD | NEW |