Subzero, MIPS32: lowerUnreachable

src/IceInstMIPS32.h

 //===- subzero/src/IceInstMIPS32.h - MIPS32 machine instrs --*- C++ -*-----===//
 //
 //                        The Subzero Code Generator
 //
 // This file is distributed under the University of Illinois Open Source
 // License. See LICENSE.TXT for details.
 //
 //===----------------------------------------------------------------------===//
 ///
 /// \file
@@ skipping 247 matching lines @@
     Srl,
     Srlv,
     Sqrt_d,
     Sqrt_s,
     Sub,
     Sub_d,
     Sub_s,
     Subu,
     Sw,
     Swc1,
+    Teq,
     Trunc_l_d,
     Trunc_l_s,
     Trunc_w_d,
     Trunc_w_s,
     Xor,
     Xori
   };
 
   static constexpr size_t InstSize = sizeof(uint32_t);
 
@@ skipping 628 matching lines @@
 private:
   InstMIPS32FPCmp(Cfg *Func, Variable *Src0, Variable *Src1)
       : InstMIPS32(Func, K, 2, nullptr) {
     addSource(Src0);
     addSource(Src1);
   };
 
   static const char *Opcode;
 };
 
+// Trap
+template <InstMIPS32::InstKindMIPS32 K>

[Jim Stichnoth, 2016/09/19 23:56:38]

I guess I should have asked this in the previous review.

Why does the Trap instruction need to be templated?  Will it ever take an
InstKind besides Teq?  Or could it be structured more like non-templated
InstMIPS32Ret?

[jaydeep.patil, 2016/09/20 03:16:54]

There 11 more trap instructions (like TNE, TGE, TLT etc.).

+class InstMIPS32Trap : public InstMIPS32 {
+  InstMIPS32Trap() = delete;
+  InstMIPS32Trap(const InstMIPS32Trap &) = delete;
+  InstMIPS32Trap &operator=(const InstMIPS32Trap &) = delete;
+
+public:
+  static InstMIPS32Trap *create(Cfg *Func, Operand *Src0, Operand *Src1,
+                                uint32_t Tcode) {
+    return new (Func->allocate<InstMIPS32Trap>())
+        InstMIPS32Trap(Func, Src0, Src1, Tcode);
+  }
+
+  uint32_t getTrapCode() const { return TrapCode; }
+
+  void emit(const Cfg *Func) const override {
+    if (!BuildDefs::dump())
+      return;
+    Ostream &Str = Func->getContext()->getStrEmit();
+    Str << "\t" << Opcode << "\t";
+    getSrc(0)->emit(Func);
+    Str << ", ";
+    getSrc(1)->emit(Func);
+    Str << ", " << TrapCode;
+  }
+
+  void emitIAS(const Cfg *Func) const override {
+    (void)Func;
+    llvm_unreachable("Not yet implemented");
+  }
+
+  void dump(const Cfg *Func) const override {
+    if (!BuildDefs::dump())
+      return;
+    Ostream &Str = Func->getContext()->getStrEmit();
+    Str << "\t" << Opcode << "\t";
+    getSrc(0)->emit(Func);
+    Str << ", ";
+    getSrc(1)->emit(Func);
+    Str << ", " << TrapCode;
+  }
+
+  static bool classof(const Inst *Inst) { return isClassof(Inst, K); }
+
+private:
+  InstMIPS32Trap(Cfg *Func, Operand *Src0, Operand *Src1, const uint32_t Tcode)
+      : InstMIPS32(Func, K, 2, nullptr), TrapCode(Tcode) {
+    addSource(Src0);
+    addSource(Src1);
+  }
+
+  static const char *Opcode;
+  const uint32_t TrapCode;
+};
+
 template <InstMIPS32::InstKindMIPS32 K, bool Signed = false>
 class InstMIPS32Imm16 : public InstMIPS32 {
   InstMIPS32Imm16() = delete;
   InstMIPS32Imm16(const InstMIPS32Imm16 &) = delete;
   InstMIPS32Imm16 &operator=(const InstMIPS32Imm16 &) = delete;
 
 public:
   static InstMIPS32Imm16 *create(Cfg *Func, Variable *Dest, Operand *Source,
                                  uint32_t Imm) {
     return new (Func->allocate<InstMIPS32Imm16>())
@@ skipping 187 matching lines @@
 using InstMIPS32Sra = InstMIPS32Imm16<InstMIPS32::Sra>;
 using InstMIPS32Srav = InstMIPS32ThreeAddrGPR<InstMIPS32::Srav>;
 using InstMIPS32Srl = InstMIPS32Imm16<InstMIPS32::Srl>;
 using InstMIPS32Srlv = InstMIPS32ThreeAddrGPR<InstMIPS32::Srlv>;
 using InstMIPS32Sub = InstMIPS32ThreeAddrGPR<InstMIPS32::Sub>;
 using InstMIPS32Sub_d = InstMIPS32ThreeAddrFPR<InstMIPS32::Sub_d>;
 using InstMIPS32Sub_s = InstMIPS32ThreeAddrFPR<InstMIPS32::Sub_s>;
 using InstMIPS32Subu = InstMIPS32ThreeAddrGPR<InstMIPS32::Subu>;
 using InstMIPS32Sw = InstMIPS32Store<InstMIPS32::Sw>;
 using InstMIPS32Swc1 = InstMIPS32Store<InstMIPS32::Swc1>;
+using InstMIPS32Teq = InstMIPS32Trap<InstMIPS32::Teq>;
 using InstMIPS32Trunc_l_d = InstMIPS32TwoAddrFPR<InstMIPS32::Trunc_l_d>;
 using InstMIPS32Trunc_l_s = InstMIPS32TwoAddrFPR<InstMIPS32::Trunc_l_s>;
 using InstMIPS32Trunc_w_d = InstMIPS32TwoAddrFPR<InstMIPS32::Trunc_w_d>;
 using InstMIPS32Trunc_w_s = InstMIPS32TwoAddrFPR<InstMIPS32::Trunc_w_s>;
 using InstMIPS32Ori = InstMIPS32Imm16<InstMIPS32::Ori>;
 using InstMIPS32Xor = InstMIPS32ThreeAddrGPR<InstMIPS32::Xor>;
 using InstMIPS32Xori = InstMIPS32Imm16<InstMIPS32::Xori>;
 
 /// Handles (some of) vmov's various formats.
 class InstMIPS32Mov final : public InstMIPS32 {
@@ skipping 79 matching lines @@
 template <> void InstMIPS32Slti::emitIAS(const Cfg *Func) const;
 template <> void InstMIPS32Sltiu::emitIAS(const Cfg *Func) const;
 template <> void InstMIPS32Sltu::emitIAS(const Cfg *Func) const;
 template <> void InstMIPS32Sqrt_d::emitIAS(const Cfg *Func) const;
 template <> void InstMIPS32Sqrt_s::emitIAS(const Cfg *Func) const;
 template <> void InstMIPS32Sw::emitIAS(const Cfg *Func) const;
 template <> void InstMIPS32Sra::emitIAS(const Cfg *Func) const;
 template <> void InstMIPS32Srl::emitIAS(const Cfg *Func) const;
 template <> void InstMIPS32Sub_d::emitIAS(const Cfg *Func) const;
 template <> void InstMIPS32Sub_s::emitIAS(const Cfg *Func) const;
+template <> void InstMIPS32Teq::emitIAS(const Cfg *Func) const;
 template <> void InstMIPS32Trunc_l_d::emitIAS(const Cfg *Func) const;
 template <> void InstMIPS32Trunc_l_s::emitIAS(const Cfg *Func) const;
 template <> void InstMIPS32Trunc_w_d::emitIAS(const Cfg *Func) const;
 template <> void InstMIPS32Trunc_w_s::emitIAS(const Cfg *Func) const;
 template <> void InstMIPS32Xor::emitIAS(const Cfg *Func) const;
 template <> void InstMIPS32Xori::emitIAS(const Cfg *Func) const;
 
 } // end of namespace MIPS32
 } // end of namespace Ice
 
 #endif // SUBZERO_SRC_ICEINSTMIPS32_H