Subzero, MIPS32: lowerUnreachable

src/IceInstMIPS32.cpp

 //===- subzero/src/IceInstMips32.cpp - Mips32 instruction implementation --===//
 //
 //                        The Subzero Code Generator
 //
 // This file is distributed under the University of Illinois Open Source
 // License. See LICENSE.TXT for details.
 //
 //===----------------------------------------------------------------------===//
 //
 /// \file
@@ skipping 122 matching lines @@
 template <> const char *InstMIPS32Sra::Opcode = "sra";
 template <> const char *InstMIPS32Srav::Opcode = "srav";
 template <> const char *InstMIPS32Srl::Opcode = "srl";
 template <> const char *InstMIPS32Srlv::Opcode = "srlv";
 template <> const char *InstMIPS32Sub::Opcode = "sub";
 template <> const char *InstMIPS32Sub_d::Opcode = "sub.d";
 template <> const char *InstMIPS32Sub_s::Opcode = "sub.s";
 template <> const char *InstMIPS32Subu::Opcode = "subu";
 template <> const char *InstMIPS32Sw::Opcode = "sw";
 template <> const char *InstMIPS32Swc1::Opcode = "swc1";
+template <> const char *InstMIPS32Teq::Opcode = "teq";
 template <> const char *InstMIPS32Trunc_l_d::Opcode = "trunc.l.d";
 template <> const char *InstMIPS32Trunc_l_s::Opcode = "trunc.l.s";
 template <> const char *InstMIPS32Trunc_w_d::Opcode = "trunc.w.d";
 template <> const char *InstMIPS32Trunc_w_s::Opcode = "trunc.w.s";
 template <> const char *InstMIPS32Xor::Opcode = "xor";
 template <> const char *InstMIPS32Xori::Opcode = "xori";
 
 template <> void InstMIPS32Lui::emit(const Cfg *Func) const {
   if (!BuildDefs::dump())
     return;
@@ skipping 829 matching lines @@
 }
 
 template <> void InstMIPS32Sw::emitIAS(const Cfg *Func) const {
   auto *Asm = Func->getAssembler<MIPS32::AssemblerMIPS32>();
   auto *Mem = llvm::dyn_cast<OperandMIPS32Mem>(getSrc(1));
   ConstantInteger32 *Offset = llvm::cast<ConstantInteger32>(Mem->getOffset());
   uint32_t Imm = static_cast<uint32_t>(Offset->getValue());
   Asm->sw(getSrc(0), Mem->getBase(), Imm);
 }
 
+template <> void InstMIPS32Teq::emitIAS(const Cfg *Func) const {
+  auto *Asm = Func->getAssembler<MIPS32::AssemblerMIPS32>();
+  Asm->teq(getSrc(0), getSrc(1), getTrapCode());
+}
+
 template <> void InstMIPS32Trunc_l_d::emitIAS(const Cfg *Func) const {
   auto *Asm = Func->getAssembler<MIPS32::AssemblerMIPS32>();
   Asm->trunc_l_d(getDest(), getSrc(0));
 }
 
 template <> void InstMIPS32Trunc_l_s::emitIAS(const Cfg *Func) const {
   auto *Asm = Func->getAssembler<MIPS32::AssemblerMIPS32>();
   Asm->trunc_l_s(getDest(), getSrc(0));
 }
 
@@ skipping 12 matching lines @@
   Asm->xor_(getDest(), getSrc(0), getSrc(1));
 }
 
 template <> void InstMIPS32Xori::emitIAS(const Cfg *Func) const {
   auto *Asm = Func->getAssembler<MIPS32::AssemblerMIPS32>();
   Asm->xori(getDest(), getSrc(0), Imm);
 }
 
 } // end of namespace MIPS32
 } // end of namespace Ice