Subzero, MIPS32: lowerUnreachable

src/IceAssemblerMIPS32.cpp

 //===- subzero/src/IceAssemblerMIPS32.cpp - MIPS32 Assembler --------------===//
 //
 //                        The Subzero Code Generator
 //
 // This file is distributed under the University of Illinois Open Source
 // License. See LICENSE.TXT for details.
 //
 //===----------------------------------------------------------------------===//
 ///
 /// \file
@@ skipping 635 matching lines @@
   }
   case IceType_f64: {
     static constexpr IValueT Opcode = 0xF4000000;
     emitFtRsImm16(Opcode, OpRt, OpBase, Offset, "sdc1");
     break;
   }
   default: { UnimplementedError(getFlags()); }
   }
 }
 
+void AssemblerMIPS32::teq(const Operand *OpRs, const Operand *OpRt,
+                          const uint32_t TrapCode) {
+  IValueT Opcode = 0x00000034;
+  const IValueT Rs = encodeGPRegister(OpRs, "Rs", "teq");
+  const IValueT Rt = encodeGPRegister(OpRt, "Rt", "teq");
+  Opcode |= TrapCode << 6;
+  Opcode |= Rt << 16;
+  Opcode |= Rs << 21;
+  emitInst(Opcode);
+}
+
 void AssemblerMIPS32::trunc_l_d(const Operand *OpFd, const Operand *OpFs) {
   static constexpr IValueT Opcode = 0x4400000D;
   emitCOP1FmtFsFd(Opcode, Long, OpFd, OpFs, "trunc.l.d");
 }
 
 void AssemblerMIPS32::trunc_l_s(const Operand *OpFd, const Operand *OpFs) {
   static constexpr IValueT Opcode = 0x4400000D;
   emitCOP1FmtFsFd(Opcode, Long, OpFd, OpFs, "trunc.l.s");
 }
 
@@ skipping 88 matching lines @@
     emitBr(Cond, OpRs, OpRtNone, Dest);
     return;
   }
   const IOffsetT Position = Buffer.size();
   emitBr(Cond, OpRs, OpRtNone, TargetLabel->getEncodedPosition());
   TargetLabel->linkTo(*this, Position);
 }
 
 } // end of namespace MIPS32
 } // end of namespace Ice