Chromium Code Reviews
chromiumcodereview-hr@appspot.gserviceaccount.com (chromiumcodereview-hr) | Please choose your nickname with Settings | Help | Chromium Project | Gerrit Changes | Sign out
(1)

Side by Side Diff: src/ia32/disasm-ia32.cc

Issue 23451024: Add a missing instruction to the ia32 disassembler. (Closed) Base URL: https://v8.googlecode.com/svn/branches/bleeding_edge
Patch Set: Created 7 years, 3 months ago
Use n/p to move between diff chunks; N/P to move between comments. Draft comments are only viewable by you.
Jump to:
View unified diff | Download patch | Annotate | Revision Log
« no previous file with comments | « no previous file | no next file » | no next file with comments »
Toggle Intra-line Diffs ('i') | Expand Comments ('e') | Collapse Comments ('c') | Show Comments Hide Comments ('s')
OLDNEW
1 // Copyright 2011 the V8 project authors. All rights reserved. 1 // Copyright 2011 the V8 project authors. All rights reserved.
2 // Redistribution and use in source and binary forms, with or without 2 // Redistribution and use in source and binary forms, with or without
3 // modification, are permitted provided that the following conditions are 3 // modification, are permitted provided that the following conditions are
4 // met: 4 // met:
5 // 5 //
6 // * Redistributions of source code must retain the above copyright 6 // * Redistributions of source code must retain the above copyright
7 // notice, this list of conditions and the following disclaimer. 7 // notice, this list of conditions and the following disclaimer.
8 // * Redistributions in binary form must reproduce the above 8 // * Redistributions in binary form must reproduce the above
9 // copyright notice, this list of conditions and the following 9 // copyright notice, this list of conditions and the following
10 // disclaimer in the documentation and/or other materials provided 10 // disclaimer in the documentation and/or other materials provided
(...skipping 680 matching lines...) Expand 10 before | Expand all | Expand 10 after
691 } 691 }
692 692
693 int DisassemblerIA32::MemoryFPUInstruction(int escape_opcode, 693 int DisassemblerIA32::MemoryFPUInstruction(int escape_opcode,
694 int modrm_byte, 694 int modrm_byte,
695 byte* modrm_start) { 695 byte* modrm_start) {
696 const char* mnem = "?"; 696 const char* mnem = "?";
697 int regop = (modrm_byte >> 3) & 0x7; // reg/op field of modrm byte. 697 int regop = (modrm_byte >> 3) & 0x7; // reg/op field of modrm byte.
698 switch (escape_opcode) { 698 switch (escape_opcode) {
699 case 0xD9: switch (regop) { 699 case 0xD9: switch (regop) {
700 case 0: mnem = "fld_s"; break; 700 case 0: mnem = "fld_s"; break;
701 case 2: mnem = "fstp_s"; break;
Toon Verwaest 2013/09/11 11:51:42 This one is not popping; so fst_s.
701 case 3: mnem = "fstp_s"; break; 702 case 3: mnem = "fstp_s"; break;
702 case 7: mnem = "fstcw"; break; 703 case 7: mnem = "fstcw"; break;
703 default: UnimplementedInstruction(); 704 default: UnimplementedInstruction();
704 } 705 }
705 break; 706 break;
706 707
707 case 0xDB: switch (regop) { 708 case 0xDB: switch (regop) {
708 case 0: mnem = "fild_s"; break; 709 case 0: mnem = "fild_s"; break;
709 case 1: mnem = "fisttp_s"; break; 710 case 1: mnem = "fisttp_s"; break;
710 case 2: mnem = "fist_s"; break; 711 case 2: mnem = "fist_s"; break;
(...skipping 1016 matching lines...) Expand 10 before | Expand all | Expand 10 after
1727 fprintf(f, " "); 1728 fprintf(f, " ");
1728 } 1729 }
1729 fprintf(f, " %s\n", buffer.start()); 1730 fprintf(f, " %s\n", buffer.start());
1730 } 1731 }
1731 } 1732 }
1732 1733
1733 1734
1734 } // namespace disasm 1735 } // namespace disasm
1735 1736
1736 #endif // V8_TARGET_ARCH_IA32 1737 #endif // V8_TARGET_ARCH_IA32
OLDNEW
« no previous file with comments | « no previous file | no next file » | no next file with comments »

Powered by Google App Engine
This is Rietveld 408576698