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1 // Copyright 2011 the V8 project authors. All rights reserved. | 1 // Copyright 2011 the V8 project authors. All rights reserved. |
2 // Redistribution and use in source and binary forms, with or without | 2 // Redistribution and use in source and binary forms, with or without |
3 // modification, are permitted provided that the following conditions are | 3 // modification, are permitted provided that the following conditions are |
4 // met: | 4 // met: |
5 // | 5 // |
6 // * Redistributions of source code must retain the above copyright | 6 // * Redistributions of source code must retain the above copyright |
7 // notice, this list of conditions and the following disclaimer. | 7 // notice, this list of conditions and the following disclaimer. |
8 // * Redistributions in binary form must reproduce the above | 8 // * Redistributions in binary form must reproduce the above |
9 // copyright notice, this list of conditions and the following | 9 // copyright notice, this list of conditions and the following |
10 // disclaimer in the documentation and/or other materials provided | 10 // disclaimer in the documentation and/or other materials provided |
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691 } | 691 } |
692 | 692 |
693 int DisassemblerIA32::MemoryFPUInstruction(int escape_opcode, | 693 int DisassemblerIA32::MemoryFPUInstruction(int escape_opcode, |
694 int modrm_byte, | 694 int modrm_byte, |
695 byte* modrm_start) { | 695 byte* modrm_start) { |
696 const char* mnem = "?"; | 696 const char* mnem = "?"; |
697 int regop = (modrm_byte >> 3) & 0x7; // reg/op field of modrm byte. | 697 int regop = (modrm_byte >> 3) & 0x7; // reg/op field of modrm byte. |
698 switch (escape_opcode) { | 698 switch (escape_opcode) { |
699 case 0xD9: switch (regop) { | 699 case 0xD9: switch (regop) { |
700 case 0: mnem = "fld_s"; break; | 700 case 0: mnem = "fld_s"; break; |
701 case 2: mnem = "fstp_s"; break; | |
Toon Verwaest
2013/09/11 11:51:42
This one is not popping; so fst_s.
| |
701 case 3: mnem = "fstp_s"; break; | 702 case 3: mnem = "fstp_s"; break; |
702 case 7: mnem = "fstcw"; break; | 703 case 7: mnem = "fstcw"; break; |
703 default: UnimplementedInstruction(); | 704 default: UnimplementedInstruction(); |
704 } | 705 } |
705 break; | 706 break; |
706 | 707 |
707 case 0xDB: switch (regop) { | 708 case 0xDB: switch (regop) { |
708 case 0: mnem = "fild_s"; break; | 709 case 0: mnem = "fild_s"; break; |
709 case 1: mnem = "fisttp_s"; break; | 710 case 1: mnem = "fisttp_s"; break; |
710 case 2: mnem = "fist_s"; break; | 711 case 2: mnem = "fist_s"; break; |
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1727 fprintf(f, " "); | 1728 fprintf(f, " "); |
1728 } | 1729 } |
1729 fprintf(f, " %s\n", buffer.start()); | 1730 fprintf(f, " %s\n", buffer.start()); |
1730 } | 1731 } |
1731 } | 1732 } |
1732 | 1733 |
1733 | 1734 |
1734 } // namespace disasm | 1735 } // namespace disasm |
1735 | 1736 |
1736 #endif // V8_TARGET_ARCH_IA32 | 1737 #endif // V8_TARGET_ARCH_IA32 |
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