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Side by Side Diff: src/IceAssemblerMIPS32.h

Issue 2341713003: Subzero, MIPS32: Floating point support in ELF output (Closed) Base URL: https://chromium.googlesource.com/native_client/pnacl-subzero.git@master
Patch Set: Created 4 years, 3 months ago
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1 //===- subzero/src/IceAssemblerMIPS32.h - Assembler for MIPS ----*- C++ -*-===// 1 //===- subzero/src/IceAssemblerMIPS32.h - Assembler for MIPS ----*- C++ -*-===//
2 // 2 //
3 // The Subzero Code Generator 3 // The Subzero Code Generator
4 // 4 //
5 // This file is distributed under the University of Illinois Open Source 5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details. 6 // License. See LICENSE.TXT for details.
7 // 7 //
8 //===----------------------------------------------------------------------===// 8 //===----------------------------------------------------------------------===//
9 /// 9 ///
10 /// \file 10 /// \file
11 /// \brief Declares the Assembler class for MIPS32. 11 /// \brief Declares the Assembler class for MIPS32.
12 /// 12 ///
13 //===----------------------------------------------------------------------===// 13 //===----------------------------------------------------------------------===//
14 14
15 #ifndef SUBZERO_SRC_ICEASSEMBLERMIPS32_H 15 #ifndef SUBZERO_SRC_ICEASSEMBLERMIPS32_H
16 #define SUBZERO_SRC_ICEASSEMBLERMIPS32_H 16 #define SUBZERO_SRC_ICEASSEMBLERMIPS32_H
17 17
18 #include "IceAssembler.h" 18 #include "IceAssembler.h"
19 #include "IceDefs.h" 19 #include "IceDefs.h"
20 #include "IceFixups.h" 20 #include "IceFixups.h"
21 #include "IceInstMIPS32.h" 21 #include "IceInstMIPS32.h"
22 #include "IceTargetLowering.h" 22 #include "IceTargetLowering.h"
23 23
24 namespace Ice { 24 namespace Ice {
25 namespace MIPS32 { 25 namespace MIPS32 {
26 26
27 using IValueT = uint32_t; 27 using IValueT = uint32_t;
28 using IOffsetT = int32_t; 28 using IOffsetT = int32_t;
29 29
30 enum FPInstDataFormat {
31 SinglePrecision = 16,
32 DoublePrecision = 17,
33 Word = 20,
34 Long = 21
35 };
36
30 class AssemblerMIPS32 : public Assembler { 37 class AssemblerMIPS32 : public Assembler {
31 AssemblerMIPS32(const AssemblerMIPS32 &) = delete; 38 AssemblerMIPS32(const AssemblerMIPS32 &) = delete;
32 AssemblerMIPS32 &operator=(const AssemblerMIPS32 &) = delete; 39 AssemblerMIPS32 &operator=(const AssemblerMIPS32 &) = delete;
33 40
34 public: 41 public:
35 explicit AssemblerMIPS32(bool use_far_branches = false) 42 explicit AssemblerMIPS32(bool use_far_branches = false)
36 : Assembler(Asm_MIPS32) { 43 : Assembler(Asm_MIPS32) {
37 // This mode is only needed and implemented for MIPS32 and ARM. 44 // This mode is only needed and implemented for MIPS32 and ARM.
38 assert(!use_far_branches); 45 assert(!use_far_branches);
39 (void)use_far_branches; 46 (void)use_far_branches;
40 } 47 }
41 ~AssemblerMIPS32() override { 48 ~AssemblerMIPS32() override {
42 if (BuildDefs::asserts()) { 49 if (BuildDefs::asserts()) {
43 for (const Label *Label : CfgNodeLabels) { 50 for (const Label *Label : CfgNodeLabels) {
44 Label->finalCheck(); 51 Label->finalCheck();
45 } 52 }
46 for (const Label *Label : LocalLabels) { 53 for (const Label *Label : LocalLabels) {
47 Label->finalCheck(); 54 Label->finalCheck();
48 } 55 }
49 } 56 }
50 } 57 }
51 58
52 void trap(); 59 void trap();
53 60
54 void nop(); 61 void nop();
55 62
56 void emitRtRsImm16(IValueT Opcode, const Operand *OpRt, const Operand *OpRs, 63 void emitRtRsImm16(IValueT Opcode, const Operand *OpRt, const Operand *OpRs,
57 const uint32_t Imm, const char *InsnName); 64 const uint32_t Imm, const char *InsnName);
Jim Stichnoth 2016/09/15 04:53:45 "const uint32_t" is kind of odd as a function argu
obucinac 2016/09/15 13:35:06 I dont have the opinion on this, I was just follow
58 65
66 void emitFtRsImm16(IValueT Opcode, const Operand *OpFt, const Operand *OpRs,
67 const uint32_t Imm, const char *InsnName);
68
59 void emitRdRtSa(IValueT Opcode, const Operand *OpRd, const Operand *OpRt, 69 void emitRdRtSa(IValueT Opcode, const Operand *OpRd, const Operand *OpRt,
60 const uint32_t Sa, const char *InsnName); 70 const uint32_t Sa, const char *InsnName);
61 71
62 void emitRdRsRt(IValueT Opcode, const Operand *OpRd, const Operand *OpRs, 72 void emitRdRsRt(IValueT Opcode, const Operand *OpRd, const Operand *OpRs,
63 const Operand *OpRt, const char *InsnName); 73 const Operand *OpRt, const char *InsnName);
64 74
75 void emitFPFormatFtFsFd(IValueT Opcode, FPInstDataFormat Format,
76 const Operand *OpFd, const Operand *OpFs,
77 const Operand *OpFt, const char *InsnName);
78
65 void emitBr(const CondMIPS32::Cond Cond, const Operand *OpRs, 79 void emitBr(const CondMIPS32::Cond Cond, const Operand *OpRs,
66 const Operand *OpRt, IOffsetT Offset); 80 const Operand *OpRt, IOffsetT Offset);
67 81
82 void add_d(const Operand *OpFt, const Operand *OpFs, const Operand *OpFd);
83
84 void add_s(const Operand *OpFt, const Operand *OpFs, const Operand *OpFd);
85
86 void div_d(const Operand *OpFt, const Operand *OpFs, const Operand *OpFd);
87
88 void div_s(const Operand *OpFt, const Operand *OpFs, const Operand *OpFd);
89
90 void mul_d(const Operand *OpFt, const Operand *OpFs, const Operand *OpFd);
91
92 void mul_s(const Operand *OpFt, const Operand *OpFs, const Operand *OpFd);
93
94 void sub_d(const Operand *OpFt, const Operand *OpFs, const Operand *OpFd);
95
96 void sub_s(const Operand *OpFt, const Operand *OpFs, const Operand *OpFd);
97
68 void addiu(const Operand *OpRt, const Operand *OpRs, const uint32_t Imm); 98 void addiu(const Operand *OpRt, const Operand *OpRs, const uint32_t Imm);
69 99
70 void slti(const Operand *OpRt, const Operand *OpRs, const uint32_t Imm); 100 void slti(const Operand *OpRt, const Operand *OpRs, const uint32_t Imm);
71 101
72 void sltiu(const Operand *OpRt, const Operand *OpRs, const uint32_t Imm); 102 void sltiu(const Operand *OpRt, const Operand *OpRs, const uint32_t Imm);
73 103
74 void and_(const Operand *OpRd, const Operand *OpRs, const Operand *OpRt); 104 void and_(const Operand *OpRd, const Operand *OpRs, const Operand *OpRt);
75 105
76 void andi(const Operand *OpRt, const Operand *OpRs, const uint32_t Imm); 106 void andi(const Operand *OpRt, const Operand *OpRs, const uint32_t Imm);
77 107
(...skipping 95 matching lines...) Expand 10 before | Expand all | Expand 10 after
173 void emitInst(IValueT Value) { 203 void emitInst(IValueT Value) {
174 AssemblerBuffer::EnsureCapacity _(&Buffer); 204 AssemblerBuffer::EnsureCapacity _(&Buffer);
175 Buffer.emit<IValueT>(Value); 205 Buffer.emit<IValueT>(Value);
176 } 206 }
177 }; 207 };
178 208
179 } // end of namespace MIPS32 209 } // end of namespace MIPS32
180 } // end of namespace Ice 210 } // end of namespace Ice
181 211
182 #endif // SUBZERO_SRC_ICEASSEMBLERMIPS32_H 212 #endif // SUBZERO_SRC_ICEASSEMBLERMIPS32_H
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