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1 // Copyright (c) 2016, the Dart project authors. Please see the AUTHORS file | 1 // Copyright (c) 2016, the Dart project authors. Please see the AUTHORS file |
2 // for details. All rights reserved. Use of this source code is governed by a | 2 // for details. All rights reserved. Use of this source code is governed by a |
3 // BSD-style license that can be found in the LICENSE file. | 3 // BSD-style license that can be found in the LICENSE file. |
4 | 4 |
5 #ifndef VM_CONSTANTS_DBC_H_ | 5 #ifndef VM_CONSTANTS_DBC_H_ |
6 #define VM_CONSTANTS_DBC_H_ | 6 #define VM_CONSTANTS_DBC_H_ |
7 | 7 |
8 #include "platform/globals.h" | 8 #include "platform/globals.h" |
9 #include "platform/assert.h" | 9 #include "platform/assert.h" |
10 #include "platform/utils.h" | 10 #include "platform/utils.h" |
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213 // immediately following instruction is skipped. | 213 // immediately following instruction is skipped. |
214 // | 214 // |
215 // - DMin, DMax, DAdd, DSub, DMul, DDiv, DPow, DMod rA, rB, rC | 215 // - DMin, DMax, DAdd, DSub, DMul, DDiv, DPow, DMod rA, rB, rC |
216 // | 216 // |
217 // Arithmetic operaions on unboxed doubles. FP[rA] <- FP[rB] op FP[rC]. | 217 // Arithmetic operaions on unboxed doubles. FP[rA] <- FP[rB] op FP[rC]. |
218 // | 218 // |
219 // - DNeg, DCos, DSin, DSqrt rA, rD | 219 // - DNeg, DCos, DSin, DSqrt rA, rD |
220 // | 220 // |
221 // FP[rA] <- op(FP[rD]). Assumes FP[rD] is an unboxed double. | 221 // FP[rA] <- op(FP[rD]). Assumes FP[rD] is an unboxed double. |
222 // | 222 // |
| 223 // - DTruncate, DFloor, DCeil rA, rD |
| 224 // |
| 225 // Applies trunc(), floor(), or ceil() to the unboxed double in FP[rD], and |
| 226 // stores the result in FP[rA]. |
| 227 // |
| 228 // - DoubleToFloat, FloatToDouble rA, rD |
| 229 // |
| 230 // Convert the unboxed float or double in FP[rD] as indicated, and store the |
| 231 // result in FP[rA]. |
| 232 // |
223 // - BitOr, BitAnd, BitXor rA, rB, rC | 233 // - BitOr, BitAnd, BitXor rA, rB, rC |
224 // | 234 // |
225 // FP[rA] <- FP[rB] op FP[rC]. These instructions expect their operands to be | 235 // FP[rA] <- FP[rB] op FP[rC]. These instructions expect their operands to be |
226 // Smis, but don't check that they are. | 236 // Smis, but don't check that they are. |
227 // | 237 // |
228 // - BitNot rA, rD | 238 // - BitNot rA, rD |
229 // | 239 // |
230 // FP[rA] <- ~FP[rD]. As above, assumes FP[rD] is a Smi. | 240 // FP[rA] <- ~FP[rD]. As above, assumes FP[rD] is a Smi. |
231 // | 241 // |
232 // - WriteIntoDouble rA, rD | 242 // - WriteIntoDouble rA, rD |
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676 V(DMul, A_B_C, reg, reg, reg) \ | 686 V(DMul, A_B_C, reg, reg, reg) \ |
677 V(DDiv, A_B_C, reg, reg, reg) \ | 687 V(DDiv, A_B_C, reg, reg, reg) \ |
678 V(DNeg, A_D, reg, reg, ___) \ | 688 V(DNeg, A_D, reg, reg, ___) \ |
679 V(DSqrt, A_D, reg, reg, ___) \ | 689 V(DSqrt, A_D, reg, reg, ___) \ |
680 V(DMin, A_B_C, reg, reg, reg) \ | 690 V(DMin, A_B_C, reg, reg, reg) \ |
681 V(DMax, A_B_C, reg, reg, reg) \ | 691 V(DMax, A_B_C, reg, reg, reg) \ |
682 V(DCos, A_D, reg, reg, ___) \ | 692 V(DCos, A_D, reg, reg, ___) \ |
683 V(DSin, A_D, reg, reg, ___) \ | 693 V(DSin, A_D, reg, reg, ___) \ |
684 V(DPow, A_B_C, reg, reg, reg) \ | 694 V(DPow, A_B_C, reg, reg, reg) \ |
685 V(DMod, A_B_C, reg, reg, reg) \ | 695 V(DMod, A_B_C, reg, reg, reg) \ |
| 696 V(DTruncate, A_D, reg, reg, ___) \ |
| 697 V(DFloor, A_D, reg, reg, ___) \ |
| 698 V(DCeil, A_D, reg, reg, ___) \ |
| 699 V(DoubleToFloat, A_D, reg, reg, ___) \ |
| 700 V(FloatToDouble, A_D, reg, reg, ___) \ |
686 V(StoreStaticTOS, D, lit, ___, ___) \ | 701 V(StoreStaticTOS, D, lit, ___, ___) \ |
687 V(PushStatic, D, lit, ___, ___) \ | 702 V(PushStatic, D, lit, ___, ___) \ |
688 V(InitStaticTOS, 0, ___, ___, ___) \ | 703 V(InitStaticTOS, 0, ___, ___, ___) \ |
689 V(IfNeStrictTOS, 0, ___, ___, ___) \ | 704 V(IfNeStrictTOS, 0, ___, ___, ___) \ |
690 V(IfEqStrictTOS, 0, ___, ___, ___) \ | 705 V(IfEqStrictTOS, 0, ___, ___, ___) \ |
691 V(IfNeStrictNumTOS, 0, ___, ___, ___) \ | 706 V(IfNeStrictNumTOS, 0, ___, ___, ___) \ |
692 V(IfEqStrictNumTOS, 0, ___, ___, ___) \ | 707 V(IfEqStrictNumTOS, 0, ___, ___, ___) \ |
693 V(IfNeStrict, A_D, reg, reg, ___) \ | 708 V(IfNeStrict, A_D, reg, reg, ___) \ |
694 V(IfEqStrict, A_D, reg, reg, ___) \ | 709 V(IfEqStrict, A_D, reg, reg, ___) \ |
695 V(IfLe, A_D, reg, reg, ___) \ | 710 V(IfLe, A_D, reg, reg, ___) \ |
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905 | 920 |
906 // After a comparison, the condition NEXT_IS_TRUE means the following | 921 // After a comparison, the condition NEXT_IS_TRUE means the following |
907 // instruction is executed if the comparision is true and skipped over overwise. | 922 // instruction is executed if the comparision is true and skipped over overwise. |
908 // Conidition NEXT_IS_FALSE means the following instruction is executed if the | 923 // Conidition NEXT_IS_FALSE means the following instruction is executed if the |
909 // comparison is false and skipped over otherwise. | 924 // comparison is false and skipped over otherwise. |
910 enum Condition { NEXT_IS_TRUE, NEXT_IS_FALSE }; | 925 enum Condition { NEXT_IS_TRUE, NEXT_IS_FALSE }; |
911 | 926 |
912 } // namespace dart | 927 } // namespace dart |
913 | 928 |
914 #endif // VM_CONSTANTS_DBC_H_ | 929 #endif // VM_CONSTANTS_DBC_H_ |
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