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1 // Copyright (c) 2016, the Dart project authors. Please see the AUTHORS file | 1 // Copyright (c) 2016, the Dart project authors. Please see the AUTHORS file |
2 // for details. All rights reserved. Use of this source code is governed by a | 2 // for details. All rights reserved. Use of this source code is governed by a |
3 // BSD-style license that can be found in the LICENSE file. | 3 // BSD-style license that can be found in the LICENSE file. |
4 | 4 |
5 #ifndef VM_CONSTANTS_DBC_H_ | 5 #ifndef VM_CONSTANTS_DBC_H_ |
6 #define VM_CONSTANTS_DBC_H_ | 6 #define VM_CONSTANTS_DBC_H_ |
7 | 7 |
8 #include "platform/globals.h" | 8 #include "platform/globals.h" |
9 #include "platform/assert.h" | 9 #include "platform/assert.h" |
10 #include "platform/utils.h" | 10 #include "platform/utils.h" |
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213 // immediately following instruction is skipped. | 213 // immediately following instruction is skipped. |
214 // | 214 // |
215 // - DMin, DMax, DAdd, DSub, DMul, DDiv, DPow, DMod rA, rB, rC | 215 // - DMin, DMax, DAdd, DSub, DMul, DDiv, DPow, DMod rA, rB, rC |
216 // | 216 // |
217 // Arithmetic operaions on unboxed doubles. FP[rA] <- FP[rB] op FP[rC]. | 217 // Arithmetic operaions on unboxed doubles. FP[rA] <- FP[rB] op FP[rC]. |
218 // | 218 // |
219 // - DNeg, DCos, DSin, DSqrt rA, rD | 219 // - DNeg, DCos, DSin, DSqrt rA, rD |
220 // | 220 // |
221 // FP[rA] <- op(FP[rD]). Assumes FP[rD] is an unboxed double. | 221 // FP[rA] <- op(FP[rD]). Assumes FP[rD] is an unboxed double. |
222 // | 222 // |
| 223 // - DTruncate, DFloor, DCeil rA, rD |
| 224 // |
| 225 // Applies trunc(), floor(), or ceil() to the unboxed double in FP[rD], and |
| 226 // stores the result in FP[rA]. |
| 227 // |
| 228 // - DoubleToFloat, FloatToDouble rA, rD |
| 229 // |
| 230 // Convert the unboxed float or double in FP[rD] as indicated, and store the |
| 231 // result in FP[rA]. |
| 232 // |
223 // - BitOr, BitAnd, BitXor rA, rB, rC | 233 // - BitOr, BitAnd, BitXor rA, rB, rC |
224 // | 234 // |
225 // FP[rA] <- FP[rB] op FP[rC]. These instructions expect their operands to be | 235 // FP[rA] <- FP[rB] op FP[rC]. These instructions expect their operands to be |
226 // Smis, but don't check that they are. | 236 // Smis, but don't check that they are. |
227 // | 237 // |
228 // - BitNot rA, rD | 238 // - BitNot rA, rD |
229 // | 239 // |
230 // FP[rA] <- ~FP[rD]. As above, assumes FP[rD] is a Smi. | 240 // FP[rA] <- ~FP[rD]. As above, assumes FP[rD] is a Smi. |
231 // | 241 // |
232 // - WriteIntoDouble rA, rD | 242 // - WriteIntoDouble rA, rD |
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341 // - StoreIndexedTOS | 351 // - StoreIndexedTOS |
342 // | 352 // |
343 // Store SP[0] into array SP[-2] at index SP[-1]. No typechecking is done. | 353 // Store SP[0] into array SP[-2] at index SP[-1]. No typechecking is done. |
344 // SP[-2] is assumed to be a RawArray, SP[-1] to be a smi. | 354 // SP[-2] is assumed to be a RawArray, SP[-1] to be a smi. |
345 // | 355 // |
346 // - StoreIndexed rA, rB, rC | 356 // - StoreIndexed rA, rB, rC |
347 // | 357 // |
348 // Store FP[rC] into array FP[rA] at index FP[rB]. No typechecking is done. | 358 // Store FP[rC] into array FP[rA] at index FP[rB]. No typechecking is done. |
349 // FP[rA] is assumed to be a RawArray, FP[rB] to be a smi. | 359 // FP[rA] is assumed to be a RawArray, FP[rB] to be a smi. |
350 // | 360 // |
351 // - StoreIndexed{N}{Float64, Uint8, OneByteString} rA, rB, rC | 361 // - StoreIndexed{N}{Type} rA, rB, rC |
352 // | 362 // |
353 // Where N is '' or '8'. N may only be '8' for Float64. | 363 // Where Type is Float32, Float64, Uint8, or OneByteString |
| 364 // Where N is '', '4', or '8'. N may only be '4' for Float32 and '8' for |
| 365 // Float64. |
354 // | 366 // |
355 // Store the unboxed double or tagged Smi in FP[rC] into the typed data array | 367 // Store the unboxed double or tagged Smi in FP[rC] into the typed data array |
356 // at FP[rA] at index FP[rB]. If N is not '', the index is assumed to be | 368 // at FP[rA] at index FP[rB]. If N is not '', the index is assumed to be |
357 // already scaled by N. | 369 // already scaled by N. |
358 // | 370 // |
359 // - StoreIndexedExternalUint8 rA, rB, rC | 371 // - StoreIndexedExternalUint8 rA, rB, rC |
360 // | 372 // |
361 // Similar to StoreIndexedUint8 but FP[rA] is an external typed data aray. | 373 // Similar to StoreIndexedUint8 but FP[rA] is an external typed data aray. |
362 // | 374 // |
363 // - LoadIndexed rA, rB, rC | 375 // - LoadIndexed rA, rB, rC |
364 // | 376 // |
365 // Loads from array FP[rB] at index FP[rC] into FP[rA]. No typechecking is | 377 // Loads from array FP[rB] at index FP[rC] into FP[rA]. No typechecking is |
366 // done. FP[rB] is assumed to be a RawArray, and to contain a Smi at FP[rC]. | 378 // done. FP[rB] is assumed to be a RawArray, and to contain a Smi at FP[rC]. |
367 // | 379 // |
368 // - LoadIndexed{N}{Type} rA, rB, rC | 380 // - LoadIndexed{N}{Type} rA, rB, rC |
369 // | 381 // |
370 // Where Type is Float64, OneByteString, TwoByteString, Uint8, or Int8, | 382 // Where Type is Float32, Float64, OneByteString, TwoByteString, Uint8, |
371 // and N is '' or '8'. N may only be '8' for Float64. | 383 // Int8, and N is '', '4', or '8'. N may only be '4' for Float32, and may |
| 384 // only be '8' for Float64. |
372 // | 385 // |
373 // Loads from typed data array FP[rB] at index FP[rC] into an unboxed double, | 386 // Loads from typed data array FP[rB] at index FP[rC] into an unboxed double, |
374 // or tagged Smi in FP[rA] as indicated by the type in the name. If N is not | 387 // or tagged Smi in FP[rA] as indicated by the type in the name. If N is not |
375 // '', the index is assumed to be already scaled by N. | 388 // '', the index is assumed to be already scaled by N. |
376 // | 389 // |
377 // - LoadIndexedExternal{Int8, Uint8} rA, rB, rC | 390 // - LoadIndexedExternal{Int8, Uint8} rA, rB, rC |
378 // | 391 // |
379 // Loads from the external typed data array FP[rB] at index FP[rC] into | 392 // Loads from the external typed data array FP[rB] at index FP[rC] into |
380 // FP[rA]. No typechecking is done. | 393 // FP[rA]. No typechecking is done. |
381 // | 394 // |
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676 V(DMul, A_B_C, reg, reg, reg) \ | 689 V(DMul, A_B_C, reg, reg, reg) \ |
677 V(DDiv, A_B_C, reg, reg, reg) \ | 690 V(DDiv, A_B_C, reg, reg, reg) \ |
678 V(DNeg, A_D, reg, reg, ___) \ | 691 V(DNeg, A_D, reg, reg, ___) \ |
679 V(DSqrt, A_D, reg, reg, ___) \ | 692 V(DSqrt, A_D, reg, reg, ___) \ |
680 V(DMin, A_B_C, reg, reg, reg) \ | 693 V(DMin, A_B_C, reg, reg, reg) \ |
681 V(DMax, A_B_C, reg, reg, reg) \ | 694 V(DMax, A_B_C, reg, reg, reg) \ |
682 V(DCos, A_D, reg, reg, ___) \ | 695 V(DCos, A_D, reg, reg, ___) \ |
683 V(DSin, A_D, reg, reg, ___) \ | 696 V(DSin, A_D, reg, reg, ___) \ |
684 V(DPow, A_B_C, reg, reg, reg) \ | 697 V(DPow, A_B_C, reg, reg, reg) \ |
685 V(DMod, A_B_C, reg, reg, reg) \ | 698 V(DMod, A_B_C, reg, reg, reg) \ |
| 699 V(DTruncate, A_D, reg, reg, ___) \ |
| 700 V(DFloor, A_D, reg, reg, ___) \ |
| 701 V(DCeil, A_D, reg, reg, ___) \ |
| 702 V(DoubleToFloat, A_D, reg, reg, ___) \ |
| 703 V(FloatToDouble, A_D, reg, reg, ___) \ |
686 V(StoreStaticTOS, D, lit, ___, ___) \ | 704 V(StoreStaticTOS, D, lit, ___, ___) \ |
687 V(PushStatic, D, lit, ___, ___) \ | 705 V(PushStatic, D, lit, ___, ___) \ |
688 V(InitStaticTOS, 0, ___, ___, ___) \ | 706 V(InitStaticTOS, 0, ___, ___, ___) \ |
689 V(IfNeStrictTOS, 0, ___, ___, ___) \ | 707 V(IfNeStrictTOS, 0, ___, ___, ___) \ |
690 V(IfEqStrictTOS, 0, ___, ___, ___) \ | 708 V(IfEqStrictTOS, 0, ___, ___, ___) \ |
691 V(IfNeStrictNumTOS, 0, ___, ___, ___) \ | 709 V(IfNeStrictNumTOS, 0, ___, ___, ___) \ |
692 V(IfEqStrictNumTOS, 0, ___, ___, ___) \ | 710 V(IfEqStrictNumTOS, 0, ___, ___, ___) \ |
693 V(IfNeStrict, A_D, reg, reg, ___) \ | 711 V(IfNeStrict, A_D, reg, reg, ___) \ |
694 V(IfEqStrict, A_D, reg, reg, ___) \ | 712 V(IfEqStrict, A_D, reg, reg, ___) \ |
695 V(IfLe, A_D, reg, reg, ___) \ | 713 V(IfLe, A_D, reg, reg, ___) \ |
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715 V(Allocate, D, lit, ___, ___) \ | 733 V(Allocate, D, lit, ___, ___) \ |
716 V(AllocateT, 0, ___, ___, ___) \ | 734 V(AllocateT, 0, ___, ___, ___) \ |
717 V(AllocateOpt, A_D, reg, lit, ___) \ | 735 V(AllocateOpt, A_D, reg, lit, ___) \ |
718 V(AllocateTOpt, A_D, reg, lit, ___) \ | 736 V(AllocateTOpt, A_D, reg, lit, ___) \ |
719 V(StoreIndexedTOS, 0, ___, ___, ___) \ | 737 V(StoreIndexedTOS, 0, ___, ___, ___) \ |
720 V(StoreIndexed, A_B_C, reg, reg, reg) \ | 738 V(StoreIndexed, A_B_C, reg, reg, reg) \ |
721 V(StoreIndexedUint8, A_B_C, reg, reg, reg) \ | 739 V(StoreIndexedUint8, A_B_C, reg, reg, reg) \ |
722 V(StoreIndexedExternalUint8, A_B_C, reg, reg, reg) \ | 740 V(StoreIndexedExternalUint8, A_B_C, reg, reg, reg) \ |
723 V(StoreIndexedOneByteString, A_B_C, reg, reg, reg) \ | 741 V(StoreIndexedOneByteString, A_B_C, reg, reg, reg) \ |
724 V(StoreIndexedUint32, A_B_C, reg, reg, reg) \ | 742 V(StoreIndexedUint32, A_B_C, reg, reg, reg) \ |
| 743 V(StoreIndexedFloat32, A_B_C, reg, reg, reg) \ |
| 744 V(StoreIndexed4Float32, A_B_C, reg, reg, reg) \ |
725 V(StoreIndexedFloat64, A_B_C, reg, reg, reg) \ | 745 V(StoreIndexedFloat64, A_B_C, reg, reg, reg) \ |
726 V(StoreIndexed8Float64, A_B_C, reg, reg, reg) \ | 746 V(StoreIndexed8Float64, A_B_C, reg, reg, reg) \ |
727 V(LoadIndexed, A_B_C, reg, reg, reg) \ | 747 V(LoadIndexed, A_B_C, reg, reg, reg) \ |
728 V(LoadIndexedUint8, A_B_C, reg, reg, reg) \ | 748 V(LoadIndexedUint8, A_B_C, reg, reg, reg) \ |
729 V(LoadIndexedInt8, A_B_C, reg, reg, reg) \ | 749 V(LoadIndexedInt8, A_B_C, reg, reg, reg) \ |
730 V(LoadIndexedInt32, A_B_C, reg, reg, reg) \ | 750 V(LoadIndexedInt32, A_B_C, reg, reg, reg) \ |
731 V(LoadIndexedUint32, A_B_C, reg, reg, reg) \ | 751 V(LoadIndexedUint32, A_B_C, reg, reg, reg) \ |
732 V(LoadIndexedExternalUint8, A_B_C, reg, reg, reg) \ | 752 V(LoadIndexedExternalUint8, A_B_C, reg, reg, reg) \ |
733 V(LoadIndexedExternalInt8, A_B_C, reg, reg, reg) \ | 753 V(LoadIndexedExternalInt8, A_B_C, reg, reg, reg) \ |
| 754 V(LoadIndexedFloat32, A_B_C, reg, reg, reg) \ |
| 755 V(LoadIndexed4Float32, A_B_C, reg, reg, reg) \ |
734 V(LoadIndexedFloat64, A_B_C, reg, reg, reg) \ | 756 V(LoadIndexedFloat64, A_B_C, reg, reg, reg) \ |
735 V(LoadIndexed8Float64, A_B_C, reg, reg, reg) \ | 757 V(LoadIndexed8Float64, A_B_C, reg, reg, reg) \ |
736 V(LoadIndexedOneByteString, A_B_C, reg, reg, reg) \ | 758 V(LoadIndexedOneByteString, A_B_C, reg, reg, reg) \ |
737 V(LoadIndexedTwoByteString, A_B_C, reg, reg, reg) \ | 759 V(LoadIndexedTwoByteString, A_B_C, reg, reg, reg) \ |
738 V(StoreField, A_B_C, reg, num, reg) \ | 760 V(StoreField, A_B_C, reg, num, reg) \ |
739 V(StoreFieldTOS, D, num, ___, ___) \ | 761 V(StoreFieldTOS, D, num, ___, ___) \ |
740 V(LoadField, A_B_C, reg, reg, num) \ | 762 V(LoadField, A_B_C, reg, reg, num) \ |
741 V(LoadUntagged, A_B_C, reg, reg, num) \ | 763 V(LoadUntagged, A_B_C, reg, reg, num) \ |
742 V(LoadFieldTOS, D, num, ___, ___) \ | 764 V(LoadFieldTOS, D, num, ___, ___) \ |
743 V(BooleanNegateTOS, 0, ___, ___, ___) \ | 765 V(BooleanNegateTOS, 0, ___, ___, ___) \ |
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905 | 927 |
906 // After a comparison, the condition NEXT_IS_TRUE means the following | 928 // After a comparison, the condition NEXT_IS_TRUE means the following |
907 // instruction is executed if the comparision is true and skipped over overwise. | 929 // instruction is executed if the comparision is true and skipped over overwise. |
908 // Conidition NEXT_IS_FALSE means the following instruction is executed if the | 930 // Conidition NEXT_IS_FALSE means the following instruction is executed if the |
909 // comparison is false and skipped over otherwise. | 931 // comparison is false and skipped over otherwise. |
910 enum Condition { NEXT_IS_TRUE, NEXT_IS_FALSE }; | 932 enum Condition { NEXT_IS_TRUE, NEXT_IS_FALSE }; |
911 | 933 |
912 } // namespace dart | 934 } // namespace dart |
913 | 935 |
914 #endif // VM_CONSTANTS_DBC_H_ | 936 #endif // VM_CONSTANTS_DBC_H_ |
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