| Index: src/compiler/mips/code-generator-mips.cc
|
| diff --git a/src/compiler/mips/code-generator-mips.cc b/src/compiler/mips/code-generator-mips.cc
|
| index 61d57bc46e8cae6a0ddc4669b99f71d3e48220c6..83b77a0080216ca1b7e70d3f1bde5500d99842b0 100644
|
| --- a/src/compiler/mips/code-generator-mips.cc
|
| +++ b/src/compiler/mips/code-generator-mips.cc
|
| @@ -1118,6 +1118,38 @@ CodeGenerator::CodeGenResult CodeGenerator::AssembleArchInstruction(
|
| __ sub_d(i.OutputDoubleRegister(), i.InputDoubleRegister(0),
|
| i.InputDoubleRegister(1));
|
| break;
|
| + case kMipsMaddS:
|
| + __ madd_s(i.OutputFloatRegister(), i.InputFloatRegister(0),
|
| + i.InputFloatRegister(1), i.InputFloatRegister(2));
|
| + break;
|
| + case kMipsMaddD:
|
| + __ madd_d(i.OutputDoubleRegister(), i.InputDoubleRegister(0),
|
| + i.InputDoubleRegister(1), i.InputDoubleRegister(2));
|
| + break;
|
| + case kMipsMaddfS:
|
| + __ maddf_s(i.OutputFloatRegister(), i.InputFloatRegister(1),
|
| + i.InputFloatRegister(2));
|
| + break;
|
| + case kMipsMaddfD:
|
| + __ maddf_d(i.OutputDoubleRegister(), i.InputDoubleRegister(1),
|
| + i.InputDoubleRegister(2));
|
| + break;
|
| + case kMipsMsubS:
|
| + __ msub_s(i.OutputFloatRegister(), i.InputFloatRegister(0),
|
| + i.InputFloatRegister(1), i.InputFloatRegister(2));
|
| + break;
|
| + case kMipsMsubD:
|
| + __ msub_d(i.OutputDoubleRegister(), i.InputDoubleRegister(0),
|
| + i.InputDoubleRegister(1), i.InputDoubleRegister(2));
|
| + break;
|
| + case kMipsMsubfS:
|
| + __ msubf_s(i.OutputFloatRegister(), i.InputFloatRegister(1),
|
| + i.InputFloatRegister(2));
|
| + break;
|
| + case kMipsMsubfD:
|
| + __ msubf_d(i.OutputDoubleRegister(), i.InputDoubleRegister(1),
|
| + i.InputDoubleRegister(2));
|
| + break;
|
| case kMipsMulD:
|
| // TODO(plind): add special case: right op is -1.0, see arm port.
|
| __ mul_d(i.OutputDoubleRegister(), i.InputDoubleRegister(0),
|
|
|