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Issue 2340733003: Subzero, MIPS32: Randomly insert NOP (Closed) Base URL: https://chromium.googlesource.com/native_client/pnacl-subzero.git@master
Patch Set: Addressing review comments Created 4 years, 3 months ago
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1 ; RUN: %p2i -i %s --filetype=asm --assemble --disassemble --target=mips32 \
Jim Stichnoth 2016/09/16 00:26:30 "make -f Makefile.standalone presubmit" fails earl
2 ; RUN: -a -skip-unimplemented -sz-seed=1 -nop-insertion \
3 ; RUN: -nop-insertion-percentage=50 -max-nops-per-instruction=1 \
4 ; RUN: | FileCheck %s --check-prefix=MIPS32P50N1
5 ; RUN: %p2i -i %s --filetype=asm --assemble --disassemble --target=mips32 \
6 ; RUN: -a -skip-unimplemented -sz-seed=1 -nop-insertion \
7 ; RUN: -nop-insertion-percentage=110 -max-nops-per-instruction=2 \
8 ; RUN: | FileCheck %s --check-prefix=MIPS32P110N2
9
10
11 define internal i32 @nopInsertion(i32 %a, i32 %b, i32 %c) {
12 entry:
13 %a1 = add i32 %a, 1
14 %b1 = add i32 %b, 2
15 %c1 = add i32 %c, 3
16 %a2 = sub i32 %a1, 1
17 %b2 = sub i32 %b1, 2
18 %c2 = sub i32 %c1, 3
19 %a3 = mul i32 %a2, %b2
20 %b3 = mul i32 %a3, %c2
21 ret i32 %b3
22 }
23
24 ; MIPS32P50N1-LABEL: nopInsertion
25 ; MIPS32P50N1: nop
26 ; MIPS32P50N1: addiu {{.*}}
27 ; MIPS32P50N1: sw {{.*}}
28 ; MIPS32P50N1: nop
29 ; MIPS32P50N1: sw {{.*}}
30 ; MIPS32P50N1: nop
31 ; MIPS32P50N1: sw {{.*}}
32 ; MIPS32P50N1: lw {{.*}}
33 ; MIPS32P50N1: li {{.*}}
34 ; MIPS32P50N1: nop
35 ; MIPS32P50N1: addu {{.*}}
36 ; MIPS32P50N1: sw {{.*}}
37 ; MIPS32P50N1: nop
38 ; MIPS32P50N1: lw {{.*}}
39 ; MIPS32P50N1: nop
40 ; MIPS32P50N1: li {{.*}}
41 ; MIPS32P50N1: nop
42 ; MIPS32P50N1: addu {{.*}}
43 ; MIPS32P50N1: nop
44 ; MIPS32P50N1: sw {{.*}}
45 ; MIPS32P50N1: lw {{.*}}
46 ; MIPS32P50N1: nop
47 ; MIPS32P50N1: li {{.*}}
48 ; MIPS32P50N1: addu {{.*}}
49 ; MIPS32P50N1: nop
50 ; MIPS32P50N1: sw {{.*}}
51 ; MIPS32P50N1: lw {{.*}}
52 ; MIPS32P50N1: nop
53 ; MIPS32P50N1: li {{.*}}
54 ; MIPS32P50N1: nop
55 ; MIPS32P50N1: subu {{.*}}
56 ; MIPS32P50N1: sw {{.*}}
57 ; MIPS32P50N1: lw {{.*}}
58 ; MIPS32P50N1: li {{.*}}
59 ; MIPS32P50N1: subu {{.*}}
60 ; MIPS32P50N1: sw {{.*}}
61 ; MIPS32P50N1: nop
62 ; MIPS32P50N1: lw {{.*}}
63 ; MIPS32P50N1: li {{.*}}
64 ; MIPS32P50N1: subu {{.*}}
65 ; MIPS32P50N1: nop
66 ; MIPS32P50N1: sw {{.*}}
67 ; MIPS32P50N1: nop
68 ; MIPS32P50N1: lw {{.*}}
69 ; MIPS32P50N1: nop
70 ; MIPS32P50N1: lw {{.*}}
71 ; MIPS32P50N1: nop
72 ; MIPS32P50N1: mul {{.*}}
73 ; MIPS32P50N1: nop
74 ; MIPS32P50N1: sw {{.*}}
75 ; MIPS32P50N1: lw {{.*}}
76 ; MIPS32P50N1: nop
77 ; MIPS32P50N1: lw {{.*}}
78 ; MIPS32P50N1: nop
79 ; MIPS32P50N1: mul {{.*}}
80 ; MIPS32P50N1: nop
81 ; MIPS32P50N1: sw {{.*}}
82 ; MIPS32P50N1: lw {{.*}}
83 ; MIPS32P50N1: addiu {{.*}}
84 ; MIPS32P50N1: jr ra
85 ; MIPS32P50N1: nop
86
87 ; MIPS32P110N2-LABEL: nopInsertion
88 ; MIPS32P110N2: nop
89 ; MIPS32P110N2: nop
90 ; MIPS32P110N2: addiu {{.*}}
91 ; MIPS32P110N2: nop
92 ; MIPS32P110N2: nop
93 ; MIPS32P110N2: sw {{.*}}
94 ; MIPS32P110N2: nop
95 ; MIPS32P110N2: nop
96 ; MIPS32P110N2: sw {{.*}}
97 ; MIPS32P110N2: nop
98 ; MIPS32P110N2: nop
99 ; MIPS32P110N2: sw {{.*}}
100 ; MIPS32P110N2: nop
101 ; MIPS32P110N2: nop
102 ; MIPS32P110N2: lw {{.*}}
103 ; MIPS32P110N2: nop
104 ; MIPS32P110N2: nop
105 ; MIPS32P110N2: li {{.*}}
106 ; MIPS32P110N2: nop
107 ; MIPS32P110N2: nop
108 ; MIPS32P110N2: addu {{.*}}
109 ; MIPS32P110N2: nop
110 ; MIPS32P110N2: nop
111 ; MIPS32P110N2: sw {{.*}}
112 ; MIPS32P110N2: nop
113 ; MIPS32P110N2: nop
114 ; MIPS32P110N2: lw {{.*}}
115 ; MIPS32P110N2: nop
116 ; MIPS32P110N2: nop
117 ; MIPS32P110N2: li {{.*}}
118 ; MIPS32P110N2: nop
119 ; MIPS32P110N2: nop
120 ; MIPS32P110N2: addu {{.*}}
121 ; MIPS32P110N2: nop
122 ; MIPS32P110N2: nop
123 ; MIPS32P110N2: sw {{.*}}
124 ; MIPS32P110N2: nop
125 ; MIPS32P110N2: nop
126 ; MIPS32P110N2: lw {{.*}}
127 ; MIPS32P110N2: nop
128 ; MIPS32P110N2: nop
129 ; MIPS32P110N2: li {{.*}}
130 ; MIPS32P110N2: nop
131 ; MIPS32P110N2: nop
132 ; MIPS32P110N2: addu {{.*}}
133 ; MIPS32P110N2: nop
134 ; MIPS32P110N2: nop
135 ; MIPS32P110N2: sw {{.*}}
136 ; MIPS32P110N2: nop
137 ; MIPS32P110N2: nop
138 ; MIPS32P110N2: lw {{.*}}
139 ; MIPS32P110N2: nop
140 ; MIPS32P110N2: nop
141 ; MIPS32P110N2: li {{.*}}
142 ; MIPS32P110N2: nop
143 ; MIPS32P110N2: nop
144 ; MIPS32P110N2: subu {{.*}}
145 ; MIPS32P110N2: nop
146 ; MIPS32P110N2: nop
147 ; MIPS32P110N2: sw {{.*}}
148 ; MIPS32P110N2: nop
149 ; MIPS32P110N2: nop
150 ; MIPS32P110N2: lw {{.*}}
151 ; MIPS32P110N2: nop
152 ; MIPS32P110N2: nop
153 ; MIPS32P110N2: li {{.*}}
154 ; MIPS32P110N2: nop
155 ; MIPS32P110N2: nop
156 ; MIPS32P110N2: subu {{.*}}
157 ; MIPS32P110N2: nop
158 ; MIPS32P110N2: nop
159 ; MIPS32P110N2: sw {{.*}}
160 ; MIPS32P110N2: nop
161 ; MIPS32P110N2: nop
162 ; MIPS32P110N2: lw {{.*}}
163 ; MIPS32P110N2: nop
164 ; MIPS32P110N2: nop
165 ; MIPS32P110N2: li {{.*}}
166 ; MIPS32P110N2: nop
167 ; MIPS32P110N2: nop
168 ; MIPS32P110N2: subu {{.*}}
169 ; MIPS32P110N2: nop
170 ; MIPS32P110N2: nop
171 ; MIPS32P110N2: sw {{.*}}
172 ; MIPS32P110N2: nop
173 ; MIPS32P110N2: nop
174 ; MIPS32P110N2: lw {{.*}}
175 ; MIPS32P110N2: nop
176 ; MIPS32P110N2: nop
177 ; MIPS32P110N2: lw {{.*}}
178 ; MIPS32P110N2: nop
179 ; MIPS32P110N2: nop
180 ; MIPS32P110N2: mul {{.*}}
181 ; MIPS32P110N2: nop
182 ; MIPS32P110N2: nop
183 ; MIPS32P110N2: sw {{.*}}
184 ; MIPS32P110N2: nop
185 ; MIPS32P110N2: nop
186 ; MIPS32P110N2: lw {{.*}}
187 ; MIPS32P110N2: nop
188 ; MIPS32P110N2: nop
189 ; MIPS32P110N2: lw {{.*}}
190 ; MIPS32P110N2: nop
191 ; MIPS32P110N2: nop
192 ; MIPS32P110N2: mul {{.*}}
193 ; MIPS32P110N2: nop
194 ; MIPS32P110N2: nop
195 ; MIPS32P110N2: sw {{.*}}
196 ; MIPS32P110N2: nop
197 ; MIPS32P110N2: nop
198 ; MIPS32P110N2: lw {{.*}}
199 ; MIPS32P110N2: nop
200 ; MIPS32P110N2: nop
201 ; MIPS32P110N2: addiu {{.*}}
202 ; MIPS32P110N2: nop
203 ; MIPS32P110N2: nop
204 ; MIPS32P110N2: jr ra
205 ; MIPS32P110N2: nop
206 ; MIPS32P110N2: nop
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