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| 1 // Copyright 2012 the V8 project authors. All rights reserved. | 1 // Copyright 2012 the V8 project authors. All rights reserved. |
| 2 // Redistribution and use in source and binary forms, with or without | 2 // Redistribution and use in source and binary forms, with or without |
| 3 // modification, are permitted provided that the following conditions are | 3 // modification, are permitted provided that the following conditions are |
| 4 // met: | 4 // met: |
| 5 // | 5 // |
| 6 // * Redistributions of source code must retain the above copyright | 6 // * Redistributions of source code must retain the above copyright |
| 7 // notice, this list of conditions and the following disclaimer. | 7 // notice, this list of conditions and the following disclaimer. |
| 8 // * Redistributions in binary form must reproduce the above | 8 // * Redistributions in binary form must reproduce the above |
| 9 // copyright notice, this list of conditions and the following | 9 // copyright notice, this list of conditions and the following |
| 10 // disclaimer in the documentation and/or other materials provided | 10 // disclaimer in the documentation and/or other materials provided |
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| 405 } \ | 405 } \ |
| 406 void operator delete(void* object) { \ | 406 void operator delete(void* object) { \ |
| 407 Logger::DeleteEventStatic(name, object); \ | 407 Logger::DeleteEventStatic(name, object); \ |
| 408 ::operator delete(object); \ | 408 ::operator delete(object); \ |
| 409 } | 409 } |
| 410 #else | 410 #else |
| 411 #define TRACK_MEMORY(name) | 411 #define TRACK_MEMORY(name) |
| 412 #endif | 412 #endif |
| 413 | 413 |
| 414 | 414 |
| 415 enum CpuImplementer { | |
| 416 UNKNOWN_IMPLEMENTER, | |
| 417 ARM_IMPLEMENTER, | |
| 418 QUALCOMM_IMPLEMENTER | |
| 419 }; | |
| 420 | |
| 421 | |
| 422 enum CpuPart { | |
| 423 CPU_UNKNOWN, | |
| 424 CORTEX_A15, | |
| 425 CORTEX_A12, | |
| 426 CORTEX_A9, | |
| 427 CORTEX_A8, | |
| 428 CORTEX_A7, | |
| 429 CORTEX_A5 | |
| 430 }; | |
| 431 | |
| 432 | |
| 433 // Feature flags bit positions. They are mostly based on the CPUID spec. | 415 // Feature flags bit positions. They are mostly based on the CPUID spec. |
| 434 // (We assign CPUID itself to one of the currently reserved bits -- | |
| 435 // feel free to change this if needed.) | |
| 436 // On X86/X64, values below 32 are bits in EDX, values above 32 are bits in ECX. | 416 // On X86/X64, values below 32 are bits in EDX, values above 32 are bits in ECX. |
| 437 enum CpuFeature { SSE4_1 = 32 + 19, // x86 | 417 enum CpuFeature { SSE4_1 = 32 + 19, // x86 |
| 438 SSE3 = 32 + 0, // x86 | 418 SSE3 = 32 + 0, // x86 |
| 439 SSE2 = 26, // x86 | 419 SSE2 = 26, // x86 |
| 440 CMOV = 15, // x86 | 420 CMOV = 15, // x86 |
| 441 CPUID = 10, // x86 | |
| 442 VFP3 = 1, // ARM | 421 VFP3 = 1, // ARM |
| 443 ARMv7 = 2, // ARM | 422 ARMv7 = 2, // ARM |
| 444 SUDIV = 3, // ARM | 423 SUDIV = 3, // ARM |
| 445 UNALIGNED_ACCESSES = 4, // ARM | 424 UNALIGNED_ACCESSES = 4, // ARM |
| 446 MOVW_MOVT_IMMEDIATE_LOADS = 5, // ARM | 425 MOVW_MOVT_IMMEDIATE_LOADS = 5, // ARM |
| 447 VFP32DREGS = 6, // ARM | 426 VFP32DREGS = 6, // ARM |
| 448 NEON = 7, // ARM | 427 NEON = 7, // ARM |
| 449 SAHF = 0, // x86 | 428 SAHF = 0, // x86 |
| 450 FPU = 1}; // MIPS | 429 FPU = 1}; // MIPS |
| 451 | 430 |
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| 580 | 559 |
| 581 enum ClearExceptionFlag { | 560 enum ClearExceptionFlag { |
| 582 KEEP_EXCEPTION, | 561 KEEP_EXCEPTION, |
| 583 CLEAR_EXCEPTION | 562 CLEAR_EXCEPTION |
| 584 }; | 563 }; |
| 585 | 564 |
| 586 | 565 |
| 587 } } // namespace v8::internal | 566 } } // namespace v8::internal |
| 588 | 567 |
| 589 #endif // V8_V8GLOBALS_H_ | 568 #endif // V8_V8GLOBALS_H_ |
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