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Issue 23401002: Fix the CPU feature detection. (Closed) Base URL: https://v8.googlecode.com/svn/branches/bleeding_edge
Patch Set: Improve cpuinfo parsing. Created 7 years, 4 months ago
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1 // Copyright (c) 1994-2006 Sun Microsystems Inc. 1 // Copyright (c) 1994-2006 Sun Microsystems Inc.
2 // All Rights Reserved. 2 // All Rights Reserved.
3 // 3 //
4 // Redistribution and use in source and binary forms, with or without 4 // Redistribution and use in source and binary forms, with or without
5 // modification, are permitted provided that the following conditions 5 // modification, are permitted provided that the following conditions
6 // are met: 6 // are met:
7 // 7 //
8 // - Redistributions of source code must retain the above copyright notice, 8 // - Redistributions of source code must retain the above copyright notice,
9 // this list of conditions and the following disclaimer. 9 // this list of conditions and the following disclaimer.
10 // 10 //
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145 if (FLAG_enable_32dregs) { 145 if (FLAG_enable_32dregs) {
146 supported_ |= static_cast<uint64_t>(1) << VFP32DREGS; 146 supported_ |= static_cast<uint64_t>(1) << VFP32DREGS;
147 } 147 }
148 148
149 if (FLAG_enable_unaligned_accesses) { 149 if (FLAG_enable_unaligned_accesses) {
150 supported_ |= static_cast<uint64_t>(1) << UNALIGNED_ACCESSES; 150 supported_ |= static_cast<uint64_t>(1) << UNALIGNED_ACCESSES;
151 } 151 }
152 152
153 #else // __arm__ 153 #else // __arm__
154 // Probe for additional features not already known to be available. 154 // Probe for additional features not already known to be available.
155 if (!IsSupported(VFP3) && FLAG_enable_vfp3 && OS::ArmCpuHasFeature(VFP3)) { 155 CPU cpu;
156 if (!IsSupported(VFP3) && FLAG_enable_vfp3 && cpu.has_vfp3()) {
156 // This implementation also sets the VFP flags if runtime 157 // This implementation also sets the VFP flags if runtime
157 // detection of VFP returns true. VFPv3 implies ARMv7, see ARM DDI 158 // detection of VFP returns true. VFPv3 implies ARMv7, see ARM DDI
158 // 0406B, page A1-6. 159 // 0406B, page A1-6.
159 found_by_runtime_probing_only_ |= 160 found_by_runtime_probing_only_ |=
160 static_cast<uint64_t>(1) << VFP3 | 161 static_cast<uint64_t>(1) << VFP3 |
161 static_cast<uint64_t>(1) << ARMv7; 162 static_cast<uint64_t>(1) << ARMv7;
162 } 163 }
163 164
164 if (!IsSupported(NEON) && FLAG_enable_neon && OS::ArmCpuHasFeature(NEON)) { 165 if (!IsSupported(NEON) && FLAG_enable_neon && cpu.has_neon()) {
165 found_by_runtime_probing_only_ |= 1u << NEON; 166 found_by_runtime_probing_only_ |= 1u << NEON;
166 } 167 }
167 168
168 if (!IsSupported(ARMv7) && FLAG_enable_armv7 && OS::ArmCpuHasFeature(ARMv7)) { 169 if (!IsSupported(ARMv7) && FLAG_enable_armv7 && cpu.architecture() >= 7) {
169 found_by_runtime_probing_only_ |= static_cast<uint64_t>(1) << ARMv7; 170 found_by_runtime_probing_only_ |= static_cast<uint64_t>(1) << ARMv7;
170 } 171 }
171 172
172 if (!IsSupported(SUDIV) && FLAG_enable_sudiv && OS::ArmCpuHasFeature(SUDIV)) { 173 if (!IsSupported(SUDIV) && FLAG_enable_sudiv && cpu.has_idiva()) {
173 found_by_runtime_probing_only_ |= static_cast<uint64_t>(1) << SUDIV; 174 found_by_runtime_probing_only_ |= static_cast<uint64_t>(1) << SUDIV;
174 } 175 }
175 176
176 if (!IsSupported(UNALIGNED_ACCESSES) && FLAG_enable_unaligned_accesses 177 if (!IsSupported(UNALIGNED_ACCESSES) && FLAG_enable_unaligned_accesses
177 && OS::ArmCpuHasFeature(ARMv7)) { 178 && cpu.architecture() >= 7) {
178 found_by_runtime_probing_only_ |= 179 found_by_runtime_probing_only_ |=
179 static_cast<uint64_t>(1) << UNALIGNED_ACCESSES; 180 static_cast<uint64_t>(1) << UNALIGNED_ACCESSES;
180 } 181 }
181 182
182 CpuImplementer implementer = OS::GetCpuImplementer(); 183 // Use movw/movt for QUALCOMM ARMv7 cores.
183 if (implementer == QUALCOMM_IMPLEMENTER && 184 if (cpu.implementer() == CPU::QUALCOMM &&
184 FLAG_enable_movw_movt && OS::ArmCpuHasFeature(ARMv7)) { 185 cpu.architecture() >= 7 &&
186 FLAG_enable_movw_movt) {
185 found_by_runtime_probing_only_ |= 187 found_by_runtime_probing_only_ |=
186 static_cast<uint64_t>(1) << MOVW_MOVT_IMMEDIATE_LOADS; 188 static_cast<uint64_t>(1) << MOVW_MOVT_IMMEDIATE_LOADS;
187 } 189 }
188 190
189 CpuPart part = OS::GetCpuPart(implementer); 191 // ARM Cortex-A9 and Cortex-A5 have 32 byte cachelines.
190 if ((part == CORTEX_A9) || (part == CORTEX_A5)) { 192 if (cpu.implementer() == CPU::ARM &&
193 (cpu.part() == CPU::ARM_CORTEX_A5 ||
194 cpu.part() == CPU::ARM_CORTEX_A9)) {
191 cache_line_size_ = 32; 195 cache_line_size_ = 32;
192 } 196 }
193 197
194 if (!IsSupported(VFP32DREGS) && FLAG_enable_32dregs 198 if (!IsSupported(VFP32DREGS) && FLAG_enable_32dregs && cpu.has_vfp3_d32()) {
195 && OS::ArmCpuHasFeature(VFP32DREGS)) {
196 found_by_runtime_probing_only_ |= static_cast<uint64_t>(1) << VFP32DREGS; 199 found_by_runtime_probing_only_ |= static_cast<uint64_t>(1) << VFP32DREGS;
197 } 200 }
198 201
199 supported_ |= found_by_runtime_probing_only_; 202 supported_ |= found_by_runtime_probing_only_;
200 #endif 203 #endif
201 204
202 // Assert that VFP3 implies ARMv7. 205 // Assert that VFP3 implies ARMv7.
203 ASSERT(!IsSupported(VFP3) || IsSupported(ARMv7)); 206 ASSERT(!IsSupported(VFP3) || IsSupported(ARMv7));
204 } 207 }
205 208
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3351 3354
3352 // Since a constant pool was just emitted, move the check offset forward by 3355 // Since a constant pool was just emitted, move the check offset forward by
3353 // the standard interval. 3356 // the standard interval.
3354 next_buffer_check_ = pc_offset() + kCheckPoolInterval; 3357 next_buffer_check_ = pc_offset() + kCheckPoolInterval;
3355 } 3358 }
3356 3359
3357 3360
3358 } } // namespace v8::internal 3361 } } // namespace v8::internal
3359 3362
3360 #endif // V8_TARGET_ARCH_ARM 3363 #endif // V8_TARGET_ARCH_ARM
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