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Side by Side Diff: test/unittests/compiler/arm64/instruction-selector-arm64-unittest.cc

Issue 2337953003: [arm64] Resolve TODO in instruction selector tests. (Closed)
Patch Set: Created 4 years, 3 months ago
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1 // Copyright 2014 the V8 project authors. All rights reserved. 1 // Copyright 2014 the V8 project authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be 2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file. 3 // found in the LICENSE file.
4 4
5 #include "test/unittests/compiler/instruction-selector-unittest.h" 5 #include "test/unittests/compiler/instruction-selector-unittest.h"
6 6
7 namespace v8 { 7 namespace v8 {
8 namespace internal { 8 namespace internal {
9 namespace compiler { 9 namespace compiler {
10 10
(...skipping 384 matching lines...) Expand 10 before | Expand all | Expand 10 after
395 ASSERT_EQ(1U, s.size()); 395 ASSERT_EQ(1U, s.size());
396 EXPECT_EQ(dpi.arch_opcode, s[0]->arch_opcode()); 396 EXPECT_EQ(dpi.arch_opcode, s[0]->arch_opcode());
397 EXPECT_EQ(2U, s[0]->InputCount()); 397 EXPECT_EQ(2U, s[0]->InputCount());
398 EXPECT_EQ(1U, s[0]->OutputCount()); 398 EXPECT_EQ(1U, s[0]->OutputCount());
399 } 399 }
400 400
401 401
402 TEST_P(InstructionSelectorLogicalTest, Immediate) { 402 TEST_P(InstructionSelectorLogicalTest, Immediate) {
403 const MachInst2 dpi = GetParam(); 403 const MachInst2 dpi = GetParam();
404 const MachineType type = dpi.machine_type; 404 const MachineType type = dpi.machine_type;
405 // TODO(all): Add support for testing 64-bit immediates.
406 if (type == MachineType::Int32()) { 405 if (type == MachineType::Int32()) {
407 // Immediate on the right. 406 // Immediate on the right.
408 TRACED_FOREACH(int32_t, imm, kLogical32Immediates) { 407 TRACED_FOREACH(int32_t, imm, kLogical32Immediates) {
409 StreamBuilder m(this, type, type); 408 StreamBuilder m(this, type, type);
410 m.Return((m.*dpi.constructor)(m.Parameter(0), m.Int32Constant(imm))); 409 m.Return((m.*dpi.constructor)(m.Parameter(0), m.Int32Constant(imm)));
411 Stream s = m.Build(); 410 Stream s = m.Build();
412 ASSERT_EQ(1U, s.size()); 411 ASSERT_EQ(1U, s.size());
413 EXPECT_EQ(dpi.arch_opcode, s[0]->arch_opcode()); 412 EXPECT_EQ(dpi.arch_opcode, s[0]->arch_opcode());
414 ASSERT_EQ(2U, s[0]->InputCount()); 413 ASSERT_EQ(2U, s[0]->InputCount());
415 EXPECT_TRUE(s[0]->InputAt(1)->IsImmediate()); 414 EXPECT_TRUE(s[0]->InputAt(1)->IsImmediate());
416 EXPECT_EQ(imm, s.ToInt32(s[0]->InputAt(1))); 415 EXPECT_EQ(imm, s.ToInt32(s[0]->InputAt(1)));
417 EXPECT_EQ(1U, s[0]->OutputCount()); 416 EXPECT_EQ(1U, s[0]->OutputCount());
418 } 417 }
419 418
420 // Immediate on the left; all logical ops should commute. 419 // Immediate on the left; all logical ops should commute.
421 TRACED_FOREACH(int32_t, imm, kLogical32Immediates) { 420 TRACED_FOREACH(int32_t, imm, kLogical32Immediates) {
422 StreamBuilder m(this, type, type); 421 StreamBuilder m(this, type, type);
423 m.Return((m.*dpi.constructor)(m.Int32Constant(imm), m.Parameter(0))); 422 m.Return((m.*dpi.constructor)(m.Int32Constant(imm), m.Parameter(0)));
424 Stream s = m.Build(); 423 Stream s = m.Build();
425 ASSERT_EQ(1U, s.size()); 424 ASSERT_EQ(1U, s.size());
426 EXPECT_EQ(dpi.arch_opcode, s[0]->arch_opcode()); 425 EXPECT_EQ(dpi.arch_opcode, s[0]->arch_opcode());
427 ASSERT_EQ(2U, s[0]->InputCount()); 426 ASSERT_EQ(2U, s[0]->InputCount());
428 EXPECT_TRUE(s[0]->InputAt(1)->IsImmediate()); 427 EXPECT_TRUE(s[0]->InputAt(1)->IsImmediate());
429 EXPECT_EQ(imm, s.ToInt32(s[0]->InputAt(1))); 428 EXPECT_EQ(imm, s.ToInt32(s[0]->InputAt(1)));
430 EXPECT_EQ(1U, s[0]->OutputCount()); 429 EXPECT_EQ(1U, s[0]->OutputCount());
431 } 430 }
431 } else if (type == MachineType::Int64()) {
432 // Immediate on the right.
433 TRACED_FOREACH(int64_t, imm, kLogical64Immediates) {
434 StreamBuilder m(this, type, type);
435 m.Return((m.*dpi.constructor)(m.Parameter(0), m.Int64Constant(imm)));
436 Stream s = m.Build();
437 ASSERT_EQ(1U, s.size());
438 EXPECT_EQ(dpi.arch_opcode, s[0]->arch_opcode());
439 ASSERT_EQ(2U, s[0]->InputCount());
440 EXPECT_TRUE(s[0]->InputAt(1)->IsImmediate());
441 EXPECT_EQ(imm, s.ToInt64(s[0]->InputAt(1)));
442 EXPECT_EQ(1U, s[0]->OutputCount());
443 }
444
445 // Immediate on the left; all logical ops should commute.
446 TRACED_FOREACH(int64_t, imm, kLogical64Immediates) {
447 StreamBuilder m(this, type, type);
448 m.Return((m.*dpi.constructor)(m.Int64Constant(imm), m.Parameter(0)));
449 Stream s = m.Build();
450 ASSERT_EQ(1U, s.size());
451 EXPECT_EQ(dpi.arch_opcode, s[0]->arch_opcode());
452 ASSERT_EQ(2U, s[0]->InputCount());
453 EXPECT_TRUE(s[0]->InputAt(1)->IsImmediate());
454 EXPECT_EQ(imm, s.ToInt64(s[0]->InputAt(1)));
455 EXPECT_EQ(1U, s[0]->OutputCount());
456 }
432 } 457 }
433 } 458 }
434 459
435 460
436 TEST_P(InstructionSelectorLogicalTest, ShiftByImmediate) { 461 TEST_P(InstructionSelectorLogicalTest, ShiftByImmediate) {
437 const MachInst2 dpi = GetParam(); 462 const MachInst2 dpi = GetParam();
438 const MachineType type = dpi.machine_type; 463 const MachineType type = dpi.machine_type;
439 TRACED_FOREACH(Shift, shift, kShiftInstructions) { 464 TRACED_FOREACH(Shift, shift, kShiftInstructions) {
440 // Only test 64-bit shifted operands with 64-bit instructions. 465 // Only test 64-bit shifted operands with 64-bit instructions.
441 if (shift.mi.machine_type != type) continue; 466 if (shift.mi.machine_type != type) continue;
(...skipping 3874 matching lines...) Expand 10 before | Expand all | Expand 10 after
4316 ASSERT_EQ(InstructionOperand::IMMEDIATE, s[0]->InputAt(1)->kind()); 4341 ASSERT_EQ(InstructionOperand::IMMEDIATE, s[0]->InputAt(1)->kind());
4317 EXPECT_EQ(index, s.ToInt32(s[0]->InputAt(1))); 4342 EXPECT_EQ(index, s.ToInt32(s[0]->InputAt(1)));
4318 ASSERT_EQ(1U, s[0]->OutputCount()); 4343 ASSERT_EQ(1U, s[0]->OutputCount());
4319 } 4344 }
4320 } 4345 }
4321 } 4346 }
4322 4347
4323 } // namespace compiler 4348 } // namespace compiler
4324 } // namespace internal 4349 } // namespace internal
4325 } // namespace v8 4350 } // namespace v8
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