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Side by Side Diff: src/IceInstMIPS32.cpp

Issue 2337023003: Subzero, MIPS32: lowerSelect for i1, i8, i16, i32, f32, f64 (Closed) Base URL: https://chromium.googlesource.com/native_client/pnacl-subzero.git@master
Patch Set: Addressing review comments Created 4 years, 3 months ago
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1 //===- subzero/src/IceInstMips32.cpp - Mips32 instruction implementation --===// 1 //===- subzero/src/IceInstMips32.cpp - Mips32 instruction implementation --===//
2 // 2 //
3 // The Subzero Code Generator 3 // The Subzero Code Generator
4 // 4 //
5 // This file is distributed under the University of Illinois Open Source 5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details. 6 // License. See LICENSE.TXT for details.
7 // 7 //
8 //===----------------------------------------------------------------------===// 8 //===----------------------------------------------------------------------===//
9 // 9 //
10 /// \file 10 /// \file
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97 template <> const char *InstMIPS32Ldc1::Opcode = "ldc1"; 97 template <> const char *InstMIPS32Ldc1::Opcode = "ldc1";
98 template <> const char *InstMIPS32Lui::Opcode = "lui"; 98 template <> const char *InstMIPS32Lui::Opcode = "lui";
99 template <> const char *InstMIPS32Lw::Opcode = "lw"; 99 template <> const char *InstMIPS32Lw::Opcode = "lw";
100 template <> const char *InstMIPS32Lwc1::Opcode = "lwc1"; 100 template <> const char *InstMIPS32Lwc1::Opcode = "lwc1";
101 template <> const char *InstMIPS32Mfc1::Opcode = "mfc1"; 101 template <> const char *InstMIPS32Mfc1::Opcode = "mfc1";
102 template <> const char *InstMIPS32Mfhi::Opcode = "mfhi"; 102 template <> const char *InstMIPS32Mfhi::Opcode = "mfhi";
103 template <> const char *InstMIPS32Mflo::Opcode = "mflo"; 103 template <> const char *InstMIPS32Mflo::Opcode = "mflo";
104 template <> const char *InstMIPS32Mov_d::Opcode = "mov.d"; 104 template <> const char *InstMIPS32Mov_d::Opcode = "mov.d";
105 template <> const char *InstMIPS32Mov_s::Opcode = "mov.s"; 105 template <> const char *InstMIPS32Mov_s::Opcode = "mov.s";
106 template <> const char *InstMIPS32Movf::Opcode = "movf"; 106 template <> const char *InstMIPS32Movf::Opcode = "movf";
107 template <> const char *InstMIPS32Movn::Opcode = "movn";
108 template <> const char *InstMIPS32Movn_d::Opcode = "movn.d";
109 template <> const char *InstMIPS32Movn_s::Opcode = "movn.s";
107 template <> const char *InstMIPS32Movt::Opcode = "movt"; 110 template <> const char *InstMIPS32Movt::Opcode = "movt";
111 template <> const char *InstMIPS32Movz::Opcode = "movz";
112 template <> const char *InstMIPS32Movz_d::Opcode = "movz.d";
113 template <> const char *InstMIPS32Movz_s::Opcode = "movz.s";
108 template <> const char *InstMIPS32Mtc1::Opcode = "mtc1"; 114 template <> const char *InstMIPS32Mtc1::Opcode = "mtc1";
109 template <> const char *InstMIPS32Mthi::Opcode = "mthi"; 115 template <> const char *InstMIPS32Mthi::Opcode = "mthi";
110 template <> const char *InstMIPS32Mtlo::Opcode = "mtlo"; 116 template <> const char *InstMIPS32Mtlo::Opcode = "mtlo";
111 template <> const char *InstMIPS32Mul::Opcode = "mul"; 117 template <> const char *InstMIPS32Mul::Opcode = "mul";
112 template <> const char *InstMIPS32Mul_d::Opcode = "mul.d"; 118 template <> const char *InstMIPS32Mul_d::Opcode = "mul.d";
113 template <> const char *InstMIPS32Mul_s::Opcode = "mul.s"; 119 template <> const char *InstMIPS32Mul_s::Opcode = "mul.s";
114 template <> const char *InstMIPS32Mult::Opcode = "mult"; 120 template <> const char *InstMIPS32Mult::Opcode = "mult";
115 template <> const char *InstMIPS32Multu::Opcode = "multu"; 121 template <> const char *InstMIPS32Multu::Opcode = "multu";
116 template <> const char *InstMIPS32Or::Opcode = "or"; 122 template <> const char *InstMIPS32Or::Opcode = "or";
117 template <> const char *InstMIPS32Ori::Opcode = "ori"; 123 template <> const char *InstMIPS32Ori::Opcode = "ori";
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853 template <> void InstMIPS32Lw::emitIAS(const Cfg *Func) const { 859 template <> void InstMIPS32Lw::emitIAS(const Cfg *Func) const {
854 auto *Asm = Func->getAssembler<MIPS32::AssemblerMIPS32>(); 860 auto *Asm = Func->getAssembler<MIPS32::AssemblerMIPS32>();
855 auto *Mem = llvm::dyn_cast<OperandMIPS32Mem>(getSrc(0)); 861 auto *Mem = llvm::dyn_cast<OperandMIPS32Mem>(getSrc(0));
856 ConstantInteger32 *Offset = llvm::cast<ConstantInteger32>(Mem->getOffset()); 862 ConstantInteger32 *Offset = llvm::cast<ConstantInteger32>(Mem->getOffset());
857 uint32_t Imm = static_cast<uint32_t>(Offset->getValue()); 863 uint32_t Imm = static_cast<uint32_t>(Offset->getValue());
858 Asm->lw(getDest(), Mem->getBase(), Imm); 864 Asm->lw(getDest(), Mem->getBase(), Imm);
859 } 865 }
860 866
861 } // end of namespace MIPS32 867 } // end of namespace MIPS32
862 } // end of namespace Ice 868 } // end of namespace Ice
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