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Side by Side Diff: src/IceTargetLoweringMIPS32.h

Issue 2337023003: Subzero, MIPS32: lowerSelect for i1, i8, i16, i32, f32, f64 (Closed) Base URL: https://chromium.googlesource.com/native_client/pnacl-subzero.git@master
Patch Set: Created 4 years, 3 months ago
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1 //===- subzero/src/IceTargetLoweringMIPS32.h - MIPS32 lowering ---*- C++-*-===// 1 //===- subzero/src/IceTargetLoweringMIPS32.h - MIPS32 lowering ---*- C++-*-===//
2 // 2 //
3 // The Subzero Code Generator 3 // The Subzero Code Generator
4 // 4 //
5 // This file is distributed under the University of Illinois Open Source 5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details. 6 // License. See LICENSE.TXT for details.
7 // 7 //
8 //===----------------------------------------------------------------------===// 8 //===----------------------------------------------------------------------===//
9 /// 9 ///
10 /// \file 10 /// \file
(...skipping 245 matching lines...)
256 } 256 }
257 257
258 void _lwc1(Variable *Value, OperandMIPS32Mem *Mem, RelocOp Reloc = RO_No) { 258 void _lwc1(Variable *Value, OperandMIPS32Mem *Mem, RelocOp Reloc = RO_No) {
259 Context.insert<InstMIPS32Lwc1>(Value, Mem, Reloc); 259 Context.insert<InstMIPS32Lwc1>(Value, Mem, Reloc);
260 } 260 }
261 261
262 void _lui(Variable *Dest, Operand *Src, RelocOp Reloc = RO_No) { 262 void _lui(Variable *Dest, Operand *Src, RelocOp Reloc = RO_No) {
263 Context.insert<InstMIPS32Lui>(Dest, Src, Reloc); 263 Context.insert<InstMIPS32Lui>(Dest, Src, Reloc);
264 } 264 }
265 265
266 void _mfc1(Variable *Dest, Variable *Src) {
267 Context.insert<InstMIPS32Mfc1>(Dest, Src);
268 }
269
270 void _mfhi(Variable *Dest, Operand *Src) {
271 Context.insert<InstMIPS32Mfhi>(Dest, Src);
272 }
273
274 void _mflo(Variable *Dest, Operand *Src) {
275 Context.insert<InstMIPS32Mflo>(Dest, Src);
276 }
277
266 void _mov(Variable *Dest, Operand *Src0) { 278 void _mov(Variable *Dest, Operand *Src0) {
267 assert(Dest != nullptr); 279 assert(Dest != nullptr);
268 // Variable* Src0_ = llvm::dyn_cast<Variable>(Src0); 280 // Variable* Src0_ = llvm::dyn_cast<Variable>(Src0);
269 if (llvm::isa<ConstantRelocatable>(Src0)) { 281 if (llvm::isa<ConstantRelocatable>(Src0)) {
270 Context.insert<InstMIPS32La>(Dest, Src0); 282 Context.insert<InstMIPS32La>(Dest, Src0);
271 } else { 283 } else {
272 auto *Instr = Context.insert<InstMIPS32Mov>(Dest, Src0); 284 auto *Instr = Context.insert<InstMIPS32Mov>(Dest, Src0);
273 if (Instr->isMultiDest()) { 285 if (Instr->isMultiDest()) {
274 // If Instr is multi-dest, then Dest must be a Variable64On32. We add a 286 // If Instr is multi-dest, then Dest must be a Variable64On32. We add a
275 // fake-def for Instr.DestHi here. 287 // fake-def for Instr.DestHi here.
276 assert(llvm::isa<Variable64On32>(Dest)); 288 assert(llvm::isa<Variable64On32>(Dest));
277 Context.insert<InstFakeDef>(Instr->getDestHi()); 289 Context.insert<InstFakeDef>(Instr->getDestHi());
278 } 290 }
279 } 291 }
280 } 292 }
281 293
282 void _mov_d(Variable *Dest, Variable *Src) { 294 void _mov_d(Variable *Dest, Variable *Src) {
283 Context.insert<InstMIPS32Mov_d>(Dest, Src); 295 Context.insert<InstMIPS32Mov_d>(Dest, Src);
284 } 296 }
285 297
286 void _mov_s(Variable *Dest, Variable *Src) { 298 void _mov_s(Variable *Dest, Variable *Src) {
287 Context.insert<InstMIPS32Mov_s>(Dest, Src); 299 Context.insert<InstMIPS32Mov_s>(Dest, Src);
288 } 300 }
289 301
290 void _mfc1(Variable *Dest, Variable *Src) { 302 void _movn(Variable *Dest, Variable *Src0, Variable *Src1) {
291 Context.insert<InstMIPS32Mfc1>(Dest, Src); 303 Context.insert<InstMIPS32Movn>(Dest, Src0, Src1);
292 } 304 }
293 305
294 void _mfhi(Variable *Dest, Operand *Src) { 306 void _movn_d(Variable *Dest, Variable *Src0, Variable *Src1) {
295 Context.insert<InstMIPS32Mfhi>(Dest, Src); 307 Context.insert<InstMIPS32Movn_d>(Dest, Src0, Src1);
296 } 308 }
297 309
298 void _mflo(Variable *Dest, Operand *Src) { 310 void _movn_s(Variable *Dest, Variable *Src0, Variable *Src1) {
299 Context.insert<InstMIPS32Mflo>(Dest, Src); 311 Context.insert<InstMIPS32Movn_s>(Dest, Src0, Src1);
312 }
313
314 void _movz(Variable *Dest, Variable *Src0, Variable *Src1) {
315 Context.insert<InstMIPS32Movz>(Dest, Src0, Src1);
316 }
317
318 void _movz_d(Variable *Dest, Variable *Src0, Variable *Src1) {
319 Context.insert<InstMIPS32Movz_d>(Dest, Src0, Src1);
320 }
321
322 void _movz_s(Variable *Dest, Variable *Src0, Variable *Src1) {
323 Context.insert<InstMIPS32Movz_s>(Dest, Src0, Src1);
300 } 324 }
301 325
302 void _mtc1(Variable *Dest, Variable *Src) { 326 void _mtc1(Variable *Dest, Variable *Src) {
303 Context.insert<InstMIPS32Mtc1>(Dest, Src); 327 Context.insert<InstMIPS32Mtc1>(Dest, Src);
304 } 328 }
305 329
306 void _mthi(Variable *Dest, Operand *Src) { 330 void _mthi(Variable *Dest, Operand *Src) {
307 Context.insert<InstMIPS32Mthi>(Dest, Src); 331 Context.insert<InstMIPS32Mthi>(Dest, Src);
308 } 332 }
309 333
(...skipping 432 matching lines...)
742 explicit TargetHeaderMIPS32(GlobalContext *Ctx); 766 explicit TargetHeaderMIPS32(GlobalContext *Ctx);
743 767
744 private: 768 private:
745 ~TargetHeaderMIPS32() = default; 769 ~TargetHeaderMIPS32() = default;
746 }; 770 };
747 771
748 } // end of namespace MIPS32 772 } // end of namespace MIPS32
749 } // end of namespace Ice 773 } // end of namespace Ice
750 774
751 #endif // SUBZERO_SRC_ICETARGETLOWERINGMIPS32_H 775 #endif // SUBZERO_SRC_ICETARGETLOWERINGMIPS32_H
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