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1 // Copyright 2011 the V8 project authors. All rights reserved. | 1 // Copyright 2011 the V8 project authors. All rights reserved. |
2 // Redistribution and use in source and binary forms, with or without | 2 // Redistribution and use in source and binary forms, with or without |
3 // modification, are permitted provided that the following conditions are | 3 // modification, are permitted provided that the following conditions are |
4 // met: | 4 // met: |
5 // | 5 // |
6 // * Redistributions of source code must retain the above copyright | 6 // * Redistributions of source code must retain the above copyright |
7 // notice, this list of conditions and the following disclaimer. | 7 // notice, this list of conditions and the following disclaimer. |
8 // * Redistributions in binary form must reproduce the above | 8 // * Redistributions in binary form must reproduce the above |
9 // copyright notice, this list of conditions and the following | 9 // copyright notice, this list of conditions and the following |
10 // disclaimer in the documentation and/or other materials provided | 10 // disclaimer in the documentation and/or other materials provided |
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43 | 43 |
44 | 44 |
45 static void DummyStaticFunction(Object* result) { | 45 static void DummyStaticFunction(Object* result) { |
46 } | 46 } |
47 | 47 |
48 | 48 |
49 TEST(DisasmX64) { | 49 TEST(DisasmX64) { |
50 CcTest::InitializeVM(); | 50 CcTest::InitializeVM(); |
51 Isolate* isolate = CcTest::i_isolate(); | 51 Isolate* isolate = CcTest::i_isolate(); |
52 HandleScope scope(isolate); | 52 HandleScope scope(isolate); |
53 v8::internal::byte buffer[4096]; | 53 v8::internal::byte buffer[8192]; |
54 Assembler assm(isolate, buffer, sizeof buffer); | 54 Assembler assm(isolate, buffer, sizeof buffer); |
55 DummyStaticFunction(NULL); // just bloody use it (DELETE; debugging) | 55 DummyStaticFunction(NULL); // just bloody use it (DELETE; debugging) |
56 | 56 |
57 // Short immediate instructions | 57 // Short immediate instructions |
58 __ addq(rax, Immediate(12345678)); | 58 __ addq(rax, Immediate(12345678)); |
59 __ orq(rax, Immediate(12345678)); | 59 __ orq(rax, Immediate(12345678)); |
60 __ subq(rax, Immediate(12345678)); | 60 __ subq(rax, Immediate(12345678)); |
61 __ xorq(rax, Immediate(12345678)); | 61 __ xorq(rax, Immediate(12345678)); |
62 __ andq(rax, Immediate(12345678)); | 62 __ andq(rax, Immediate(12345678)); |
63 | 63 |
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413 __ subps(xmm1, xmm0); | 413 __ subps(xmm1, xmm0); |
414 __ subps(xmm1, Operand(rbx, rcx, times_4, 10000)); | 414 __ subps(xmm1, Operand(rbx, rcx, times_4, 10000)); |
415 __ mulps(xmm1, xmm0); | 415 __ mulps(xmm1, xmm0); |
416 __ mulps(xmm1, Operand(rbx, rcx, times_4, 10000)); | 416 __ mulps(xmm1, Operand(rbx, rcx, times_4, 10000)); |
417 __ divps(xmm1, xmm0); | 417 __ divps(xmm1, xmm0); |
418 __ divps(xmm1, Operand(rbx, rcx, times_4, 10000)); | 418 __ divps(xmm1, Operand(rbx, rcx, times_4, 10000)); |
419 | 419 |
420 __ ucomiss(xmm0, xmm1); | 420 __ ucomiss(xmm0, xmm1); |
421 __ ucomiss(xmm0, Operand(rbx, rcx, times_4, 10000)); | 421 __ ucomiss(xmm0, Operand(rbx, rcx, times_4, 10000)); |
422 } | 422 } |
423 // SSE 2 instructions | 423 |
| 424 // SSE2 instructions |
424 { | 425 { |
425 __ cvttsd2si(rdx, Operand(rbx, rcx, times_4, 10000)); | 426 __ cvttsd2si(rdx, Operand(rbx, rcx, times_4, 10000)); |
426 __ cvttsd2si(rdx, xmm1); | 427 __ cvttsd2si(rdx, xmm1); |
427 __ cvttsd2siq(rdx, xmm1); | 428 __ cvttsd2siq(rdx, xmm1); |
428 __ cvttsd2siq(rdx, Operand(rbx, rcx, times_4, 10000)); | 429 __ cvttsd2siq(rdx, Operand(rbx, rcx, times_4, 10000)); |
429 __ cvtqsi2sd(xmm1, Operand(rbx, rcx, times_4, 10000)); | 430 __ cvtqsi2sd(xmm1, Operand(rbx, rcx, times_4, 10000)); |
430 __ cvtqsi2sd(xmm1, rdx); | 431 __ cvtqsi2sd(xmm1, rdx); |
431 __ movsd(xmm1, Operand(rbx, rcx, times_4, 10000)); | 432 __ movsd(xmm1, Operand(rbx, rcx, times_4, 10000)); |
432 __ movsd(Operand(rbx, rcx, times_4, 10000), xmm1); | 433 __ movsd(Operand(rbx, rcx, times_4, 10000), xmm1); |
433 // 128 bit move instructions. | 434 // 128 bit move instructions. |
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460 __ pslld(xmm0, 6); | 461 __ pslld(xmm0, 6); |
461 __ psrld(xmm0, 6); | 462 __ psrld(xmm0, 6); |
462 __ psllq(xmm0, 6); | 463 __ psllq(xmm0, 6); |
463 __ psrlq(xmm0, 6); | 464 __ psrlq(xmm0, 6); |
464 | 465 |
465 __ pcmpeqd(xmm1, xmm0); | 466 __ pcmpeqd(xmm1, xmm0); |
466 | 467 |
467 __ punpckldq(xmm1, xmm11); | 468 __ punpckldq(xmm1, xmm11); |
468 __ punpckldq(xmm5, Operand(rdx, 4)); | 469 __ punpckldq(xmm5, Operand(rdx, 4)); |
469 __ punpckhdq(xmm8, xmm15); | 470 __ punpckhdq(xmm8, xmm15); |
| 471 |
| 472 #define EMIT_SSE2_INSTR(instruction, notUsed1, notUsed2, notUsed3) \ |
| 473 __ instruction(xmm5, xmm1); \ |
| 474 __ instruction(xmm5, Operand(rdx, 4)); |
| 475 |
| 476 SSE2_INSTRUCTION_LIST(EMIT_SSE2_INSTR) |
| 477 #undef EMIT_SSE2_INSTR |
470 } | 478 } |
471 | 479 |
472 // cmov. | 480 // cmov. |
473 { | 481 { |
474 __ cmovq(overflow, rax, Operand(rax, 0)); | 482 __ cmovq(overflow, rax, Operand(rax, 0)); |
475 __ cmovq(no_overflow, rax, Operand(rax, 1)); | 483 __ cmovq(no_overflow, rax, Operand(rax, 1)); |
476 __ cmovq(below, rax, Operand(rax, 2)); | 484 __ cmovq(below, rax, Operand(rax, 2)); |
477 __ cmovq(above_equal, rax, Operand(rax, 3)); | 485 __ cmovq(above_equal, rax, Operand(rax, 3)); |
478 __ cmovq(equal, rax, Operand(rbx, 0)); | 486 __ cmovq(equal, rax, Operand(rbx, 0)); |
479 __ cmovq(not_equal, rax, Operand(rbx, 1)); | 487 __ cmovq(not_equal, rax, Operand(rbx, 1)); |
480 __ cmovq(below_equal, rax, Operand(rbx, 2)); | 488 __ cmovq(below_equal, rax, Operand(rbx, 2)); |
481 __ cmovq(above, rax, Operand(rbx, 3)); | 489 __ cmovq(above, rax, Operand(rbx, 3)); |
482 __ cmovq(sign, rax, Operand(rcx, 0)); | 490 __ cmovq(sign, rax, Operand(rcx, 0)); |
483 __ cmovq(not_sign, rax, Operand(rcx, 1)); | 491 __ cmovq(not_sign, rax, Operand(rcx, 1)); |
484 __ cmovq(parity_even, rax, Operand(rcx, 2)); | 492 __ cmovq(parity_even, rax, Operand(rcx, 2)); |
485 __ cmovq(parity_odd, rax, Operand(rcx, 3)); | 493 __ cmovq(parity_odd, rax, Operand(rcx, 3)); |
486 __ cmovq(less, rax, Operand(rdx, 0)); | 494 __ cmovq(less, rax, Operand(rdx, 0)); |
487 __ cmovq(greater_equal, rax, Operand(rdx, 1)); | 495 __ cmovq(greater_equal, rax, Operand(rdx, 1)); |
488 __ cmovq(less_equal, rax, Operand(rdx, 2)); | 496 __ cmovq(less_equal, rax, Operand(rdx, 2)); |
489 __ cmovq(greater, rax, Operand(rdx, 3)); | 497 __ cmovq(greater, rax, Operand(rdx, 3)); |
490 } | 498 } |
491 | 499 |
492 { | 500 { |
| 501 if (CpuFeatures::IsSupported(SSE3)) { |
| 502 CpuFeatureScope scope(&assm, SSE3); |
| 503 __ lddqu(xmm1, Operand(rdx, 4)); |
| 504 } |
| 505 } |
| 506 |
| 507 #define EMIT_SSE34_INSTR(instruction, notUsed1, notUsed2, notUsed3, notUsed4) \ |
| 508 __ instruction(xmm5, xmm1); \ |
| 509 __ instruction(xmm5, Operand(rdx, 4)); |
| 510 |
| 511 { |
| 512 if (CpuFeatures::IsSupported(SSSE3)) { |
| 513 CpuFeatureScope scope(&assm, SSSE3); |
| 514 SSSE3_INSTRUCTION_LIST(EMIT_SSE34_INSTR) |
| 515 } |
| 516 } |
| 517 |
| 518 { |
493 if (CpuFeatures::IsSupported(SSE4_1)) { | 519 if (CpuFeatures::IsSupported(SSE4_1)) { |
494 CpuFeatureScope scope(&assm, SSE4_1); | 520 CpuFeatureScope scope(&assm, SSE4_1); |
495 __ insertps(xmm5, xmm1, 123); | 521 __ insertps(xmm5, xmm1, 123); |
496 __ extractps(rax, xmm1, 0); | 522 __ extractps(rax, xmm1, 0); |
497 __ pextrd(rbx, xmm15, 0); | 523 __ pextrd(rbx, xmm15, 0); |
498 __ pextrd(r12, xmm0, 1); | 524 __ pextrd(r12, xmm0, 1); |
499 __ pinsrd(xmm9, r9, 0); | 525 __ pinsrd(xmm9, r9, 0); |
500 __ pinsrd(xmm5, Operand(rax, 4), 1); | 526 __ pinsrd(xmm5, Operand(rax, 4), 1); |
501 | 527 |
502 __ cmpps(xmm5, xmm1, 1); | 528 __ cmpps(xmm5, xmm1, 1); |
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532 __ minps(xmm5, Operand(rdx, 4)); | 558 __ minps(xmm5, Operand(rdx, 4)); |
533 __ maxps(xmm5, xmm1); | 559 __ maxps(xmm5, xmm1); |
534 __ maxps(xmm5, Operand(rdx, 4)); | 560 __ maxps(xmm5, Operand(rdx, 4)); |
535 __ rcpps(xmm5, xmm1); | 561 __ rcpps(xmm5, xmm1); |
536 __ rcpps(xmm5, Operand(rdx, 4)); | 562 __ rcpps(xmm5, Operand(rdx, 4)); |
537 __ sqrtps(xmm5, xmm1); | 563 __ sqrtps(xmm5, xmm1); |
538 __ sqrtps(xmm5, Operand(rdx, 4)); | 564 __ sqrtps(xmm5, Operand(rdx, 4)); |
539 __ movups(xmm5, xmm1); | 565 __ movups(xmm5, xmm1); |
540 __ movups(xmm5, Operand(rdx, 4)); | 566 __ movups(xmm5, Operand(rdx, 4)); |
541 __ movups(Operand(rdx, 4), xmm5); | 567 __ movups(Operand(rdx, 4), xmm5); |
542 __ paddd(xmm5, xmm1); | |
543 __ paddd(xmm5, Operand(rdx, 4)); | |
544 __ psubd(xmm5, xmm1); | |
545 __ psubd(xmm5, Operand(rdx, 4)); | |
546 __ pmulld(xmm5, xmm1); | 568 __ pmulld(xmm5, xmm1); |
547 __ pmulld(xmm5, Operand(rdx, 4)); | 569 __ pmulld(xmm5, Operand(rdx, 4)); |
| 570 __ pmullw(xmm5, xmm1); |
| 571 __ pmullw(xmm5, Operand(rdx, 4)); |
548 __ pmuludq(xmm5, xmm1); | 572 __ pmuludq(xmm5, xmm1); |
549 __ pmuludq(xmm5, Operand(rdx, 4)); | 573 __ pmuludq(xmm5, Operand(rdx, 4)); |
550 __ psrldq(xmm5, 123); | 574 __ psrldq(xmm5, 123); |
551 __ pshufd(xmm5, xmm1, 3); | 575 __ pshufd(xmm5, xmm1, 3); |
552 __ cvtps2dq(xmm5, xmm1); | 576 __ cvtps2dq(xmm5, xmm1); |
553 __ cvtps2dq(xmm5, Operand(rdx, 4)); | 577 __ cvtps2dq(xmm5, Operand(rdx, 4)); |
554 __ cvtdq2ps(xmm5, xmm1); | 578 __ cvtdq2ps(xmm5, xmm1); |
555 __ cvtdq2ps(xmm5, Operand(rdx, 4)); | 579 __ cvtdq2ps(xmm5, Operand(rdx, 4)); |
| 580 |
| 581 SSE4_INSTRUCTION_LIST(EMIT_SSE34_INSTR) |
556 } | 582 } |
557 } | 583 } |
| 584 #undef EMIT_SSE34_INSTR |
558 | 585 |
559 // AVX instruction | 586 // AVX instruction |
560 { | 587 { |
561 if (CpuFeatures::IsSupported(AVX)) { | 588 if (CpuFeatures::IsSupported(AVX)) { |
562 CpuFeatureScope scope(&assm, AVX); | 589 CpuFeatureScope scope(&assm, AVX); |
563 __ vmovss(xmm6, xmm14, xmm2); | 590 __ vmovss(xmm6, xmm14, xmm2); |
564 __ vmovss(xmm9, Operand(rbx, rcx, times_4, 10000)); | 591 __ vmovss(xmm9, Operand(rbx, rcx, times_4, 10000)); |
565 __ vmovss(Operand(rbx, rcx, times_4, 10000), xmm0); | 592 __ vmovss(Operand(rbx, rcx, times_4, 10000), xmm0); |
566 | 593 |
567 __ vaddss(xmm0, xmm1, xmm2); | 594 __ vaddss(xmm0, xmm1, xmm2); |
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671 __ vcmpltpd(xmm5, xmm4, xmm1); | 698 __ vcmpltpd(xmm5, xmm4, xmm1); |
672 __ vcmpltpd(xmm5, xmm4, Operand(rbx, rcx, times_4, 10000)); | 699 __ vcmpltpd(xmm5, xmm4, Operand(rbx, rcx, times_4, 10000)); |
673 __ vcmplepd(xmm5, xmm4, xmm1); | 700 __ vcmplepd(xmm5, xmm4, xmm1); |
674 __ vcmplepd(xmm5, xmm4, Operand(rbx, rcx, times_4, 10000)); | 701 __ vcmplepd(xmm5, xmm4, Operand(rbx, rcx, times_4, 10000)); |
675 __ vcmpneqpd(xmm5, xmm4, xmm1); | 702 __ vcmpneqpd(xmm5, xmm4, xmm1); |
676 __ vcmpneqpd(xmm5, xmm4, Operand(rbx, rcx, times_4, 10000)); | 703 __ vcmpneqpd(xmm5, xmm4, Operand(rbx, rcx, times_4, 10000)); |
677 __ vcmpnltpd(xmm5, xmm4, xmm1); | 704 __ vcmpnltpd(xmm5, xmm4, xmm1); |
678 __ vcmpnltpd(xmm5, xmm4, Operand(rbx, rcx, times_4, 10000)); | 705 __ vcmpnltpd(xmm5, xmm4, Operand(rbx, rcx, times_4, 10000)); |
679 __ vcmpnlepd(xmm5, xmm4, xmm1); | 706 __ vcmpnlepd(xmm5, xmm4, xmm1); |
680 __ vcmpnlepd(xmm5, xmm4, Operand(rbx, rcx, times_4, 10000)); | 707 __ vcmpnlepd(xmm5, xmm4, Operand(rbx, rcx, times_4, 10000)); |
| 708 |
| 709 #define EMIT_SSE2_AVXINSTR(instruction, notUsed1, notUsed2, notUsed3) \ |
| 710 __ v##instruction(xmm10, xmm5, xmm1); \ |
| 711 __ v##instruction(xmm10, xmm5, Operand(rdx, 4)); |
| 712 |
| 713 #define EMIT_SSE34_AVXINSTR(instruction, notUsed1, notUsed2, notUsed3, \ |
| 714 notUsed4) \ |
| 715 __ v##instruction(xmm10, xmm5, xmm1); \ |
| 716 __ v##instruction(xmm10, xmm5, Operand(rdx, 4)); |
| 717 |
| 718 SSE2_INSTRUCTION_LIST(EMIT_SSE2_AVXINSTR) |
| 719 SSSE3_INSTRUCTION_LIST(EMIT_SSE34_AVXINSTR) |
| 720 SSE4_INSTRUCTION_LIST(EMIT_SSE34_AVXINSTR) |
| 721 #undef EMIT_SSE2_AVXINSTR |
| 722 #undef EMIT_SSE34_AVXINSTR |
| 723 |
| 724 __ vlddqu(xmm1, Operand(rbx, rcx, times_4, 10000)); |
| 725 __ vpsllw(xmm0, xmm15, 21); |
| 726 __ vpsrlw(xmm0, xmm15, 21); |
| 727 __ vpsraw(xmm0, xmm15, 21); |
| 728 __ vpsrad(xmm0, xmm15, 21); |
| 729 __ vpextrb(rax, xmm2, 12); |
| 730 __ vpextrb(Operand(rbx, rcx, times_4, 10000), xmm2, 12); |
| 731 __ vpextrw(rax, xmm2, 5); |
| 732 __ vpextrw(Operand(rbx, rcx, times_4, 10000), xmm2, 5); |
| 733 __ vpextrd(rax, xmm2, 2); |
| 734 __ vpextrd(Operand(rbx, rcx, times_4, 10000), xmm2, 2); |
| 735 |
| 736 __ vpinsrb(xmm1, xmm2, rax, 12); |
| 737 __ vpinsrb(xmm1, xmm2, Operand(rbx, rcx, times_4, 10000), 12); |
| 738 __ vpinsrw(xmm1, xmm2, rax, 5); |
| 739 __ vpinsrw(xmm1, xmm2, Operand(rbx, rcx, times_4, 10000), 5); |
| 740 __ vpinsrd(xmm1, xmm2, rax, 2); |
| 741 __ vpinsrd(xmm1, xmm2, Operand(rbx, rcx, times_4, 10000), 2); |
| 742 __ vpshufd(xmm1, xmm2, 85); |
681 } | 743 } |
682 } | 744 } |
683 | 745 |
684 // FMA3 instruction | 746 // FMA3 instruction |
685 { | 747 { |
686 if (CpuFeatures::IsSupported(FMA3)) { | 748 if (CpuFeatures::IsSupported(FMA3)) { |
687 CpuFeatureScope scope(&assm, FMA3); | 749 CpuFeatureScope scope(&assm, FMA3); |
688 __ vfmadd132sd(xmm0, xmm1, xmm2); | 750 __ vfmadd132sd(xmm0, xmm1, xmm2); |
689 __ vfmadd132sd(xmm0, xmm1, Operand(rbx, rcx, times_4, 10000)); | 751 __ vfmadd132sd(xmm0, xmm1, Operand(rbx, rcx, times_4, 10000)); |
690 __ vfmadd213sd(xmm0, xmm1, xmm2); | 752 __ vfmadd213sd(xmm0, xmm1, xmm2); |
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884 #ifdef OBJECT_PRINT | 946 #ifdef OBJECT_PRINT |
885 OFStream os(stdout); | 947 OFStream os(stdout); |
886 code->Print(os); | 948 code->Print(os); |
887 byte* begin = code->instruction_start(); | 949 byte* begin = code->instruction_start(); |
888 byte* end = begin + code->instruction_size(); | 950 byte* end = begin + code->instruction_size(); |
889 disasm::Disassembler::Disassemble(stdout, begin, end); | 951 disasm::Disassembler::Disassemble(stdout, begin, end); |
890 #endif | 952 #endif |
891 } | 953 } |
892 | 954 |
893 #undef __ | 955 #undef __ |
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