| Index: src/x64/disasm-x64.cc
|
| diff --git a/src/x64/disasm-x64.cc b/src/x64/disasm-x64.cc
|
| index eefa70372ec4c8ac344665cecb6c52d16479e99d..0825498129c33532bc4bab4ea75824abbb1aa4d4 100644
|
| --- a/src/x64/disasm-x64.cc
|
| +++ b/src/x64/disasm-x64.cc
|
| @@ -1153,6 +1153,25 @@ int DisassemblerX64::TwoByteOpcodeInstruction(byte* data) {
|
| get_modrm(*current, &mod, ®op, &rm);
|
| AppendToBuffer("%s %s,", mnemonic, NameOfXMMRegister(regop));
|
| current += PrintRightXMMOperand(current);
|
| + } else if (opcode == 0xC2) {
|
| + // Intel manual 2A, Table 3-18.
|
| + int mod, regop, rm;
|
| + get_modrm(*current, &mod, ®op, &rm);
|
| + const char* const pseudo_op[] = {
|
| + "cmpeqsd",
|
| + "cmpltsd",
|
| + "cmplesd",
|
| + "cmpunordsd",
|
| + "cmpneqsd",
|
| + "cmpnltsd",
|
| + "cmpnlesd",
|
| + "cmpordsd"
|
| + };
|
| + AppendToBuffer("%s %s,%s",
|
| + pseudo_op[current[1]],
|
| + NameOfXMMRegister(regop),
|
| + NameOfXMMRegister(rm));
|
| + current += 2;
|
| } else {
|
| UnimplementedInstruction();
|
| }
|
|
|