Subzero, MIPS32: Intrinsic calls for ABS.fmt and SQRT.fmt

src/IceInstMIPS32.h

 //===- subzero/src/IceInstMIPS32.h - MIPS32 machine instrs --*- C++ -*-----===//
 //
 //                        The Subzero Code Generator
 //
 // This file is distributed under the University of Illinois Open Source
 // License. See LICENSE.TXT for details.
 //
 //===----------------------------------------------------------------------===//
 ///
 /// \file
@@ skipping 127 matching lines @@
 
 /// Base class for Mips instructions.
 class InstMIPS32 : public InstTarget {
   InstMIPS32() = delete;
   InstMIPS32(const InstMIPS32 &) = delete;
   InstMIPS32 &operator=(const InstMIPS32 &) = delete;
 
 public:
   enum InstKindMIPS32 {
     k__Start = Inst::Target,
+    Abs_d,
+    Abs_s,
     Add,
     Add_d,
     Add_s,
     Addiu,
     Addu,
     And,
     Andi,
     Br,
     Call,
     Cvt_d_l,
@@ skipping 33 matching lines @@
     Sll,
     Sllv,
     Slt,
     Slti,
     Sltiu,
     Sltu,
     Sra,
     Srav,
     Srl,
     Srlv,
+    Sqrt_d,
+    Sqrt_s,
     Sub,
     Sub_d,
     Sub_s,
     Subu,
     Sw,
     Swc1,
     Trunc_l_d,
     Trunc_l_s,
     Trunc_w_d,
     Trunc_w_s,
@@ skipping 655 matching lines @@
   }
 
   InstMIPS32Imm16(Cfg *Func, Variable *Dest, uint32_t Imm)
       : InstMIPS32(Func, K, 0, Dest), Imm(Imm) {}
 
   static const char *Opcode;
 
   const uint32_t Imm;
 };
 
+using InstMIPS32Abs_d = InstMIPS32TwoAddrFPR<InstMIPS32::Abs_d>;
+using InstMIPS32Abs_s = InstMIPS32TwoAddrFPR<InstMIPS32::Abs_s>;
 using InstMIPS32Add = InstMIPS32ThreeAddrGPR<InstMIPS32::Add>;
 using InstMIPS32Add_d = InstMIPS32ThreeAddrFPR<InstMIPS32::Add_d>;
 using InstMIPS32Add_s = InstMIPS32ThreeAddrFPR<InstMIPS32::Add_s>;
 using InstMIPS32Addu = InstMIPS32ThreeAddrGPR<InstMIPS32::Addu>;
 using InstMIPS32Addiu = InstMIPS32Imm16<InstMIPS32::Addiu, true>;
 using InstMIPS32And = InstMIPS32ThreeAddrGPR<InstMIPS32::And>;
 using InstMIPS32Andi = InstMIPS32Imm16<InstMIPS32::Andi>;
 using InstMIPS32Cvt_d_s = InstMIPS32TwoAddrFPR<InstMIPS32::Cvt_d_s>;
 using InstMIPS32Cvt_d_l = InstMIPS32TwoAddrFPR<InstMIPS32::Cvt_d_l>;
 using InstMIPS32Cvt_d_w = InstMIPS32TwoAddrFPR<InstMIPS32::Cvt_d_w>;
@@ skipping 24 matching lines @@
 using InstMIPS32Multu = InstMIPS32ThreeAddrGPR<InstMIPS32::Multu>;
 using InstMIPS32Or = InstMIPS32ThreeAddrGPR<InstMIPS32::Or>;
 using InstMIPS32Ori = InstMIPS32Imm16<InstMIPS32::Ori>;
 using InstMIPS32Sdc1 = InstMIPS32Store<InstMIPS32::Sdc1>;
 using InstMIPS32Sll = InstMIPS32Imm16<InstMIPS32::Sll>;
 using InstMIPS32Sllv = InstMIPS32ThreeAddrGPR<InstMIPS32::Sllv>;
 using InstMIPS32Slt = InstMIPS32ThreeAddrGPR<InstMIPS32::Slt>;
 using InstMIPS32Slti = InstMIPS32Imm16<InstMIPS32::Slti>;
 using InstMIPS32Sltiu = InstMIPS32Imm16<InstMIPS32::Sltiu>;
 using InstMIPS32Sltu = InstMIPS32ThreeAddrGPR<InstMIPS32::Sltu>;
+using InstMIPS32Sqrt_d = InstMIPS32TwoAddrFPR<InstMIPS32::Sqrt_d>;
+using InstMIPS32Sqrt_s = InstMIPS32TwoAddrFPR<InstMIPS32::Sqrt_s>;
 using InstMIPS32Sra = InstMIPS32Imm16<InstMIPS32::Sra>;
 using InstMIPS32Srav = InstMIPS32ThreeAddrGPR<InstMIPS32::Srav>;
 using InstMIPS32Srl = InstMIPS32Imm16<InstMIPS32::Srl>;
 using InstMIPS32Srlv = InstMIPS32ThreeAddrGPR<InstMIPS32::Srlv>;
 using InstMIPS32Sub = InstMIPS32ThreeAddrGPR<InstMIPS32::Sub>;
 using InstMIPS32Sub_d = InstMIPS32ThreeAddrFPR<InstMIPS32::Sub_d>;
 using InstMIPS32Sub_s = InstMIPS32ThreeAddrFPR<InstMIPS32::Sub_s>;
 using InstMIPS32Subu = InstMIPS32ThreeAddrGPR<InstMIPS32::Subu>;
 using InstMIPS32Sw = InstMIPS32Store<InstMIPS32::Sw>;
 using InstMIPS32Swc1 = InstMIPS32Store<InstMIPS32::Swc1>;
@@ skipping 53 matching lines @@
 template <> void InstMIPS32Mtlo::emit(const Cfg *Func) const;
 template <> void InstMIPS32Mthi::emit(const Cfg *Func) const;
 template <> void InstMIPS32Mult::emit(const Cfg *Func) const;
 template <> void InstMIPS32Multu::emit(const Cfg *Func) const;
 template <> void InstMIPS32Lui::emit(const Cfg *Func) const;
 
 } // end of namespace MIPS32
 } // end of namespace Ice
 
 #endif // SUBZERO_SRC_ICEINSTMIPS32_H