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Side by Side Diff: src/IceTargetLoweringMIPS32.h

Issue 2325703002: Subzero, MIPS32: Intrinsic calls for ABS.fmt and SQRT.fmt (Closed) Base URL: https://chromium.googlesource.com/native_client/pnacl-subzero.git@master
Patch Set: Set isScalarFloatingType condition Created 4 years, 3 months ago
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1 //===- subzero/src/IceTargetLoweringMIPS32.h - MIPS32 lowering ---*- C++-*-===// 1 //===- subzero/src/IceTargetLoweringMIPS32.h - MIPS32 lowering ---*- C++-*-===//
2 // 2 //
3 // The Subzero Code Generator 3 // The Subzero Code Generator
4 // 4 //
5 // This file is distributed under the University of Illinois Open Source 5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details. 6 // License. See LICENSE.TXT for details.
7 // 7 //
8 //===----------------------------------------------------------------------===// 8 //===----------------------------------------------------------------------===//
9 /// 9 ///
10 /// \file 10 /// \file
(...skipping 169 matching lines...) Expand 10 before | Expand all | Expand 10 after
180 Operand *Src1, const InstMIPS32Label *Label, 180 Operand *Src1, const InstMIPS32Label *Label,
181 CondMIPS32::Cond Condition) { 181 CondMIPS32::Cond Condition) {
182 Context.insert<InstMIPS32Br>(TargetTrue, TargetFalse, Src0, Src1, Label, 182 Context.insert<InstMIPS32Br>(TargetTrue, TargetFalse, Src0, Src1, Label,
183 Condition); 183 Condition);
184 } 184 }
185 185
186 void _ret(Variable *RA, Variable *Src0 = nullptr) { 186 void _ret(Variable *RA, Variable *Src0 = nullptr) {
187 Context.insert<InstMIPS32Ret>(RA, Src0); 187 Context.insert<InstMIPS32Ret>(RA, Src0);
188 } 188 }
189 189
190 void _abs_d(Variable *Dest, Variable *Src) {
191 Context.insert<InstMIPS32Abs_d>(Dest, Src);
192 }
193
194 void _abs_s(Variable *Dest, Variable *Src) {
195 Context.insert<InstMIPS32Abs_s>(Dest, Src);
196 }
197
190 void _add_d(Variable *Dest, Variable *Src0, Variable *Src1) { 198 void _add_d(Variable *Dest, Variable *Src0, Variable *Src1) {
191 Context.insert<InstMIPS32Add_d>(Dest, Src0, Src1); 199 Context.insert<InstMIPS32Add_d>(Dest, Src0, Src1);
192 } 200 }
193 201
194 void _add_s(Variable *Dest, Variable *Src0, Variable *Src1) { 202 void _add_s(Variable *Dest, Variable *Src0, Variable *Src1) {
195 Context.insert<InstMIPS32Add_s>(Dest, Src0, Src1); 203 Context.insert<InstMIPS32Add_s>(Dest, Src0, Src1);
196 } 204 }
197 205
198 void _addiu(Variable *Dest, Variable *Src, uint32_t Imm) { 206 void _addiu(Variable *Dest, Variable *Src, uint32_t Imm) {
199 Context.insert<InstMIPS32Addiu>(Dest, Src, Imm); 207 Context.insert<InstMIPS32Addiu>(Dest, Src, Imm);
(...skipping 152 matching lines...) Expand 10 before | Expand all | Expand 10 after
352 } 360 }
353 361
354 void _sltiu(Variable *Dest, Variable *Src, uint32_t Imm) { 362 void _sltiu(Variable *Dest, Variable *Src, uint32_t Imm) {
355 Context.insert<InstMIPS32Sltiu>(Dest, Src, Imm); 363 Context.insert<InstMIPS32Sltiu>(Dest, Src, Imm);
356 } 364 }
357 365
358 void _sltu(Variable *Dest, Variable *Src0, Variable *Src1) { 366 void _sltu(Variable *Dest, Variable *Src0, Variable *Src1) {
359 Context.insert<InstMIPS32Sltu>(Dest, Src0, Src1); 367 Context.insert<InstMIPS32Sltu>(Dest, Src0, Src1);
360 } 368 }
361 369
370 void _sqrt_d(Variable *Dest, Variable *Src) {
371 Context.insert<InstMIPS32Sqrt_d>(Dest, Src);
372 }
373
374 void _sqrt_s(Variable *Dest, Variable *Src) {
375 Context.insert<InstMIPS32Sqrt_s>(Dest, Src);
376 }
377
362 void _sra(Variable *Dest, Variable *Src, uint32_t Imm) { 378 void _sra(Variable *Dest, Variable *Src, uint32_t Imm) {
363 Context.insert<InstMIPS32Sra>(Dest, Src, Imm); 379 Context.insert<InstMIPS32Sra>(Dest, Src, Imm);
364 } 380 }
365 381
366 void _srav(Variable *Dest, Variable *Src0, Variable *Src1) { 382 void _srav(Variable *Dest, Variable *Src0, Variable *Src1) {
367 Context.insert<InstMIPS32Srav>(Dest, Src0, Src1); 383 Context.insert<InstMIPS32Srav>(Dest, Src0, Src1);
368 } 384 }
369 385
370 void _srl(Variable *Dest, Variable *Src, uint32_t Imm) { 386 void _srl(Variable *Dest, Variable *Src, uint32_t Imm) {
371 Context.insert<InstMIPS32Srl>(Dest, Src, Imm); 387 Context.insert<InstMIPS32Srl>(Dest, Src, Imm);
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726 explicit TargetHeaderMIPS32(GlobalContext *Ctx); 742 explicit TargetHeaderMIPS32(GlobalContext *Ctx);
727 743
728 private: 744 private:
729 ~TargetHeaderMIPS32() = default; 745 ~TargetHeaderMIPS32() = default;
730 }; 746 };
731 747
732 } // end of namespace MIPS32 748 } // end of namespace MIPS32
733 } // end of namespace Ice 749 } // end of namespace Ice
734 750
735 #endif // SUBZERO_SRC_ICETARGETLOWERINGMIPS32_H 751 #endif // SUBZERO_SRC_ICETARGETLOWERINGMIPS32_H
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