Subzero, MIPS32: Intrinsic calls for ABS.fmt and SQRT.fmt

src/IceInstMIPS32.cpp

 //===- subzero/src/IceInstMips32.cpp - Mips32 instruction implementation --===//
 //
 //                        The Subzero Code Generator
 //
 // This file is distributed under the University of Illinois Open Source
 // License. See LICENSE.TXT for details.
 //
 //===----------------------------------------------------------------------===//
 //
 /// \file
@@ skipping 42 matching lines @@
   // assert(!isNegAddrMode());
   NumVars = 1;
   Vars = &this->Base;
 }
 
 const char *InstMIPS32::getWidthString(Type Ty) {
   (void)Ty;
   return "TBD";
 }
 
+template <> const char *InstMIPS32Abs_d::Opcode = "abs.d";
+template <> const char *InstMIPS32Abs_s::Opcode = "abs.s";
 template <> const char *InstMIPS32Add::Opcode = "add";
 template <> const char *InstMIPS32Add_d::Opcode = "add.d";
 template <> const char *InstMIPS32Add_s::Opcode = "add.s";
 template <> const char *InstMIPS32Addiu::Opcode = "addiu";
 template <> const char *InstMIPS32Addu::Opcode = "addu";
 template <> const char *InstMIPS32And::Opcode = "and";
 template <> const char *InstMIPS32Andi::Opcode = "andi";
 template <> const char *InstMIPS32Cvt_d_l::Opcode = "cvt.d.l";
 template <> const char *InstMIPS32Cvt_d_s::Opcode = "cvt.d.s";
 template <> const char *InstMIPS32Cvt_d_w::Opcode = "cvt.d.w";
@@ skipping 24 matching lines @@
 template <> const char *InstMIPS32Multu::Opcode = "multu";
 template <> const char *InstMIPS32Or::Opcode = "or";
 template <> const char *InstMIPS32Ori::Opcode = "ori";
 template <> const char *InstMIPS32Sdc1::Opcode = "sdc1";
 template <> const char *InstMIPS32Sll::Opcode = "sll";
 template <> const char *InstMIPS32Sllv::Opcode = "sllv";
 template <> const char *InstMIPS32Slt::Opcode = "slt";
 template <> const char *InstMIPS32Slti::Opcode = "slti";
 template <> const char *InstMIPS32Sltiu::Opcode = "sltiu";
 template <> const char *InstMIPS32Sltu::Opcode = "sltu";
+template <> const char *InstMIPS32Sqrt_d::Opcode = "sqrt.d";
+template <> const char *InstMIPS32Sqrt_s::Opcode = "sqrt.s";
 template <> const char *InstMIPS32Sra::Opcode = "sra";
 template <> const char *InstMIPS32Srav::Opcode = "srav";
 template <> const char *InstMIPS32Srl::Opcode = "srl";
 template <> const char *InstMIPS32Srlv::Opcode = "srlv";
 template <> const char *InstMIPS32Sub::Opcode = "sub";
 template <> const char *InstMIPS32Sub_d::Opcode = "sub.d";
 template <> const char *InstMIPS32Sub_s::Opcode = "sub.s";
 template <> const char *InstMIPS32Subu::Opcode = "subu";
 template <> const char *InstMIPS32Sw::Opcode = "sw";
 template <> const char *InstMIPS32Swc1::Opcode = "swc1";
@@ skipping 716 matching lines @@
 template <> void InstMIPS32Lw::emitIAS(const Cfg *Func) const {
   auto *Asm = Func->getAssembler<MIPS32::AssemblerMIPS32>();
   auto *Mem = llvm::dyn_cast<OperandMIPS32Mem>(getSrc(0));
   ConstantInteger32 *Offset = llvm::cast<ConstantInteger32>(Mem->getOffset());
   uint32_t Imm = static_cast<uint32_t>(Offset->getValue());
   Asm->lw(getDest(), Mem->getBase(), Imm);
 }
 
 } // end of namespace MIPS32
 } // end of namespace Ice