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1 // Copyright 2011 the V8 project authors. All rights reserved. | 1 // Copyright 2011 the V8 project authors. All rights reserved. |
2 // Redistribution and use in source and binary forms, with or without | 2 // Redistribution and use in source and binary forms, with or without |
3 // modification, are permitted provided that the following conditions are | 3 // modification, are permitted provided that the following conditions are |
4 // met: | 4 // met: |
5 // | 5 // |
6 // * Redistributions of source code must retain the above copyright | 6 // * Redistributions of source code must retain the above copyright |
7 // notice, this list of conditions and the following disclaimer. | 7 // notice, this list of conditions and the following disclaimer. |
8 // * Redistributions in binary form must reproduce the above | 8 // * Redistributions in binary form must reproduce the above |
9 // copyright notice, this list of conditions and the following | 9 // copyright notice, this list of conditions and the following |
10 // disclaimer in the documentation and/or other materials provided | 10 // disclaimer in the documentation and/or other materials provided |
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1158 COMPARE(dmb(LD), | 1158 COMPARE(dmb(LD), |
1159 "f57ff05d dmb ld"); | 1159 "f57ff05d dmb ld"); |
1160 COMPARE(dmb(ST), | 1160 COMPARE(dmb(ST), |
1161 "f57ff05e dmb st"); | 1161 "f57ff05e dmb st"); |
1162 COMPARE(dmb(SY), | 1162 COMPARE(dmb(SY), |
1163 "f57ff05f dmb sy"); | 1163 "f57ff05f dmb sy"); |
1164 | 1164 |
1165 COMPARE(dsb(ISH), | 1165 COMPARE(dsb(ISH), |
1166 "f57ff04b dsb ish"); | 1166 "f57ff04b dsb ish"); |
1167 | 1167 |
1168 COMPARE(isb(ISH), | 1168 COMPARE(isb(SY), |
1169 "f57ff06b isb ish"); | 1169 "f57ff06f isb sy"); |
| 1170 } else { |
| 1171 // ARMv6 uses CP15 to implement barriers. The BarrierOption argument is |
| 1172 // ignored. |
| 1173 COMPARE(dmb(ISH), |
| 1174 "ee070fba mcr (CP15DMB)"); |
| 1175 COMPARE(dsb(OSH), |
| 1176 "ee070f9a mcr (CP15DSB)"); |
| 1177 COMPARE(isb(SY), |
| 1178 "ee070f95 mcr (CP15ISB)"); |
1170 } | 1179 } |
1171 | 1180 |
| 1181 // ARMv6 barriers. |
| 1182 // Details available in ARM DDI 0406C.b, B3-1750. |
| 1183 COMPARE(mcr(p15, 0, r0, cr7, cr10, 5), "ee070fba mcr (CP15DMB)"); |
| 1184 COMPARE(mcr(p15, 0, r0, cr7, cr10, 4), "ee070f9a mcr (CP15DSB)"); |
| 1185 COMPARE(mcr(p15, 0, r0, cr7, cr5, 4), "ee070f95 mcr (CP15ISB)"); |
| 1186 // Rt is ignored. |
| 1187 COMPARE(mcr(p15, 0, lr, cr7, cr10, 5), "ee07efba mcr (CP15DMB)"); |
| 1188 COMPARE(mcr(p15, 0, lr, cr7, cr10, 4), "ee07ef9a mcr (CP15DSB)"); |
| 1189 COMPARE(mcr(p15, 0, lr, cr7, cr5, 4), "ee07ef95 mcr (CP15ISB)"); |
| 1190 // The mcr instruction can be conditional. |
| 1191 COMPARE(mcr(p15, 0, r0, cr7, cr10, 5, eq), "0e070fba mcreq (CP15DMB)"); |
| 1192 COMPARE(mcr(p15, 0, r0, cr7, cr10, 4, ne), "1e070f9a mcrne (CP15DSB)"); |
| 1193 COMPARE(mcr(p15, 0, r0, cr7, cr5, 4, mi), "4e070f95 mcrmi (CP15ISB)"); |
| 1194 |
1172 VERIFY_RUN(); | 1195 VERIFY_RUN(); |
1173 } | 1196 } |
1174 | 1197 |
1175 | 1198 |
1176 TEST(LoadStoreExclusive) { | 1199 TEST(LoadStoreExclusive) { |
1177 SET_UP(); | 1200 SET_UP(); |
1178 | 1201 |
1179 COMPARE(ldrexb(r0, r1), "e1d10f9f ldrexb r0, [r1]"); | 1202 COMPARE(ldrexb(r0, r1), "e1d10f9f ldrexb r0, [r1]"); |
1180 COMPARE(strexb(r0, r1, r2), "e1c20f91 strexb r0, r1, [r2]"); | 1203 COMPARE(strexb(r0, r1, r2), "e1c20f91 strexb r0, r1, [r2]"); |
1181 COMPARE(ldrexh(r0, r1), "e1f10f9f ldrexh r0, [r1]"); | 1204 COMPARE(ldrexh(r0, r1), "e1f10f9f ldrexh r0, [r1]"); |
1182 COMPARE(strexh(r0, r1, r2), "e1e20f91 strexh r0, r1, [r2]"); | 1205 COMPARE(strexh(r0, r1, r2), "e1e20f91 strexh r0, r1, [r2]"); |
1183 COMPARE(ldrex(r0, r1), "e1910f9f ldrex r0, [r1]"); | 1206 COMPARE(ldrex(r0, r1), "e1910f9f ldrex r0, [r1]"); |
1184 COMPARE(strex(r0, r1, r2), "e1820f91 strex r0, r1, [r2]"); | 1207 COMPARE(strex(r0, r1, r2), "e1820f91 strex r0, r1, [r2]"); |
1185 | 1208 |
1186 VERIFY_RUN(); | 1209 VERIFY_RUN(); |
1187 } | 1210 } |
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