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| 1 ; Assembly test for simple arithmetic operations. | 1 ; Assembly test for simple arithmetic operations. |
| 2 | 2 |
| 3 ; RUN: %if --need=target_X8632 --command %p2i --filetype=obj --disassemble \ | 3 ; RUN: %if --need=target_X8632 --command %p2i --filetype=obj --disassemble \ |
| 4 ; RUN: --target x8632 -i %s --args -O2 \ | 4 ; RUN: --target x8632 -i %s --args -O2 \ |
| 5 ; RUN: | %if --need=target_X8632 --command FileCheck %s | 5 ; RUN: | %if --need=target_X8632 --command FileCheck %s |
| 6 | 6 |
| 7 ; TODO(jvoung): Stop skipping unimplemented parts (via --skip-unimplemented) | 7 ; TODO(jvoung): Stop skipping unimplemented parts (via --skip-unimplemented) |
| 8 ; once enough infrastructure is in. Also, switch to --filetype=obj | 8 ; once enough infrastructure is in. Also, switch to --filetype=obj |
| 9 ; when possible. | 9 ; when possible. |
| 10 ; RUN: %if --need=target_ARM32 --need=allow_dump \ | 10 ; RUN: %if --need=target_ARM32 --need=allow_dump \ |
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| 164 ; ARM32: bne | 164 ; ARM32: bne |
| 165 ; The following instruction is ".word 0xe7fedef0 = udf #60896 ; 0xede0". | 165 ; The following instruction is ".word 0xe7fedef0 = udf #60896 ; 0xede0". |
| 166 ; ARM32: e7fedef0 | 166 ; ARM32: e7fedef0 |
| 167 ; ARM32: bl {{.*}} __divsi3 | 167 ; ARM32: bl {{.*}} __divsi3 |
| 168 ; ARM32HWDIV-LABEL: Sdiv | 168 ; ARM32HWDIV-LABEL: Sdiv |
| 169 ; ARM32HWDIV: tst | 169 ; ARM32HWDIV: tst |
| 170 ; ARM32HWDIV: bne | 170 ; ARM32HWDIV: bne |
| 171 ; ARM32HWDIV: sdiv | 171 ; ARM32HWDIV: sdiv |
| 172 | 172 |
| 173 ; MIPS32-LABEL: Sdiv | 173 ; MIPS32-LABEL: Sdiv |
| 174 ; MIPS32: div | 174 ; MIPS32: jal {{.*}} __divsi3 |
| 175 ; MIPS32: mflo | |
| 176 | 175 |
| 177 define internal i32 @SdivConst(i32 %a) { | 176 define internal i32 @SdivConst(i32 %a) { |
| 178 entry: | 177 entry: |
| 179 %div = sdiv i32 %a, 219 | 178 %div = sdiv i32 %a, 219 |
| 180 ret i32 %div | 179 ret i32 %div |
| 181 } | 180 } |
| 182 ; CHECK-LABEL: SdivConst | 181 ; CHECK-LABEL: SdivConst |
| 183 ; CHECK: cdq | 182 ; CHECK: cdq |
| 184 ; CHECK: idiv e | 183 ; CHECK: idiv e |
| 185 ; | 184 ; |
| 186 ; ARM32-LABEL: SdivConst | 185 ; ARM32-LABEL: SdivConst |
| 187 ; ARM32-NOT: tst | 186 ; ARM32-NOT: tst |
| 188 ; ARM32: bl {{.*}} __divsi3 | 187 ; ARM32: bl {{.*}} __divsi3 |
| 189 ; ARM32HWDIV-LABEL: SdivConst | 188 ; ARM32HWDIV-LABEL: SdivConst |
| 190 ; ARM32HWDIV-NOT: tst | 189 ; ARM32HWDIV-NOT: tst |
| 191 ; ARM32HWDIV: sdiv | 190 ; ARM32HWDIV: sdiv |
| 192 | 191 |
| 193 ; MIPS32-LABEL: SdivConst | 192 ; MIPS32-LABEL: SdivConst |
| 194 ; MIPS32: div | 193 ; MIPS32: jal {{.*}} __divsi3 |
| 195 ; MIPS32: mflo | |
| 196 | 194 |
| 197 define internal i32 @Srem(i32 %a, i32 %b) { | 195 define internal i32 @Srem(i32 %a, i32 %b) { |
| 198 entry: | 196 entry: |
| 199 %rem = srem i32 %a, %b | 197 %rem = srem i32 %a, %b |
| 200 ret i32 %rem | 198 ret i32 %rem |
| 201 } | 199 } |
| 202 ; CHECK-LABEL: Srem | 200 ; CHECK-LABEL: Srem |
| 203 ; CHECK: cdq | 201 ; CHECK: cdq |
| 204 ; CHECK: idiv e | 202 ; CHECK: idiv e |
| 205 ; | 203 ; |
| 206 ; ARM32-LABEL: Srem | 204 ; ARM32-LABEL: Srem |
| 207 ; ARM32: tst [[DENOM:r.*]], [[DENOM]] | 205 ; ARM32: tst [[DENOM:r.*]], [[DENOM]] |
| 208 ; ARM32: bne | 206 ; ARM32: bne |
| 209 ; ARM32: bl {{.*}} __modsi3 | 207 ; ARM32: bl {{.*}} __modsi3 |
| 210 ; ARM32HWDIV-LABEL: Srem | 208 ; ARM32HWDIV-LABEL: Srem |
| 211 ; ARM32HWDIV: tst | 209 ; ARM32HWDIV: tst |
| 212 ; ARM32HWDIV: bne | 210 ; ARM32HWDIV: bne |
| 213 ; ARM32HWDIV: sdiv | 211 ; ARM32HWDIV: sdiv |
| 214 ; ARM32HWDIV: mls | 212 ; ARM32HWDIV: mls |
| 215 | 213 |
| 216 ; MIPS32-LABEL: Srem | 214 ; MIPS32-LABEL: Srem |
| 217 ; MIPS32: div | 215 ; MIPS32: jal {{.*}} __modsi3 |
| 218 ; MIPS32: mfhi | |
| 219 | 216 |
| 220 define internal i32 @Udiv(i32 %a, i32 %b) { | 217 define internal i32 @Udiv(i32 %a, i32 %b) { |
| 221 entry: | 218 entry: |
| 222 %div = udiv i32 %a, %b | 219 %div = udiv i32 %a, %b |
| 223 ret i32 %div | 220 ret i32 %div |
| 224 } | 221 } |
| 225 ; CHECK-LABEL: Udiv | 222 ; CHECK-LABEL: Udiv |
| 226 ; CHECK: div e | 223 ; CHECK: div e |
| 227 ; | 224 ; |
| 228 ; ARM32-LABEL: Udiv | 225 ; ARM32-LABEL: Udiv |
| 229 ; ARM32: tst [[DENOM:r.*]], [[DENOM]] | 226 ; ARM32: tst [[DENOM:r.*]], [[DENOM]] |
| 230 ; ARM32: bne | 227 ; ARM32: bne |
| 231 ; ARM32: bl {{.*}} __udivsi3 | 228 ; ARM32: bl {{.*}} __udivsi3 |
| 232 ; ARM32HWDIV-LABEL: Udiv | 229 ; ARM32HWDIV-LABEL: Udiv |
| 233 ; ARM32HWDIV: tst | 230 ; ARM32HWDIV: tst |
| 234 ; ARM32HWDIV: bne | 231 ; ARM32HWDIV: bne |
| 235 ; ARM32HWDIV: udiv | 232 ; ARM32HWDIV: udiv |
| 236 | 233 |
| 237 ; MIPS32-LABEL: Udiv | 234 ; MIPS32-LABEL: Udiv |
| 238 ; MIPS32: divu | 235 ; MIPS32: jal {{.*}} __udivsi3 |
| 239 ; MIPS32: mflo | |
| 240 | 236 |
| 241 define internal i32 @Urem(i32 %a, i32 %b) { | 237 define internal i32 @Urem(i32 %a, i32 %b) { |
| 242 entry: | 238 entry: |
| 243 %rem = urem i32 %a, %b | 239 %rem = urem i32 %a, %b |
| 244 ret i32 %rem | 240 ret i32 %rem |
| 245 } | 241 } |
| 246 ; CHECK-LABEL: Urem | 242 ; CHECK-LABEL: Urem |
| 247 ; CHECK: div e | 243 ; CHECK: div e |
| 248 ; | 244 ; |
| 249 ; ARM32-LABEL: Urem | 245 ; ARM32-LABEL: Urem |
| 250 ; ARM32: tst [[DENOM:r.*]], [[DENOM]] | 246 ; ARM32: tst [[DENOM:r.*]], [[DENOM]] |
| 251 ; ARM32: bne | 247 ; ARM32: bne |
| 252 ; ARM32: bl {{.*}} __umodsi3 | 248 ; ARM32: bl {{.*}} __umodsi3 |
| 253 ; ARM32HWDIV-LABEL: Urem | 249 ; ARM32HWDIV-LABEL: Urem |
| 254 ; ARM32HWDIV: tst | 250 ; ARM32HWDIV: tst |
| 255 ; ARM32HWDIV: bne | 251 ; ARM32HWDIV: bne |
| 256 ; ARM32HWDIV: udiv | 252 ; ARM32HWDIV: udiv |
| 257 ; ARM32HWDIV: mls | 253 ; ARM32HWDIV: mls |
| 258 | 254 |
| 259 ; MIPS32-LABEL: Urem | 255 ; MIPS32-LABEL: Urem |
| 260 ; MIPS32: divu | 256 ; MIPS32: jal {{.*}} __umodsi3 |
| 261 ; MIPS32: mfhi | |
| 262 | 257 |
| 263 ; The following tests check that shift instructions don't try to use a | 258 ; The following tests check that shift instructions don't try to use a |
| 264 ; ConstantRelocatable as an immediate operand. | 259 ; ConstantRelocatable as an immediate operand. |
| 265 | 260 |
| 266 @G = internal global [4 x i8] zeroinitializer, align 4 | 261 @G = internal global [4 x i8] zeroinitializer, align 4 |
| 267 | 262 |
| 268 define internal i32 @ShlReloc(i32 %a) { | 263 define internal i32 @ShlReloc(i32 %a) { |
| 269 entry: | 264 entry: |
| 270 %opnd = ptrtoint [4 x i8]* @G to i32 | 265 %opnd = ptrtoint [4 x i8]* @G to i32 |
| 271 %result = shl i32 %a, %opnd | 266 %result = shl i32 %a, %opnd |
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| 284 ; CHECK: shr {{.*}},cl | 279 ; CHECK: shr {{.*}},cl |
| 285 | 280 |
| 286 define internal i32 @AshrReloc(i32 %a) { | 281 define internal i32 @AshrReloc(i32 %a) { |
| 287 entry: | 282 entry: |
| 288 %opnd = ptrtoint [4 x i8]* @G to i32 | 283 %opnd = ptrtoint [4 x i8]* @G to i32 |
| 289 %result = ashr i32 %a, %opnd | 284 %result = ashr i32 %a, %opnd |
| 290 ret i32 %result | 285 ret i32 %result |
| 291 } | 286 } |
| 292 ; CHECK-LABEL: AshrReloc | 287 ; CHECK-LABEL: AshrReloc |
| 293 ; CHECK: sar {{.*}},cl | 288 ; CHECK: sar {{.*}},cl |
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