[SubZero] Implement GP to/from FP moves for MIPS

src/IceRegistersMIPS32.h

 //===- subzero/src/IceRegistersMIPS32.h - Register information --*- C++ -*-===//
 //
 //                        The Subzero Code Generator
 //
 // This file is distributed under the University of Illinois Open Source
 // License. See LICENSE.TXT for details.
 //
 //===----------------------------------------------------------------------===//
 ///
 /// \file
@@ skipping 54 matching lines @@
 // TODO(jvoung): Floating point and vector registers...
 // Need to model overlap and difference in encoding too.
 
 static inline GPRRegister getEncodedGPR(RegNumT RegNum) {
   assert(int(Reg_GPR_First) <= int(RegNum));
   assert(unsigned(RegNum) <= Reg_GPR_Last);
   return GPRRegister(RegNum - Reg_GPR_First);
 }
 
 static inline bool isGPRReg(RegNumT RegNum) {
-  return (int(Reg_GPR_First) <= int(RegNum)) &&
-         (unsigned(RegNum) <= Reg_GPR_Last);
+  bool IsGPR = ((int(Reg_GPR_First) <= int(RegNum)) &&
+                (unsigned(RegNum) <= Reg_GPR_Last)) ||
+               ((int(Reg_I64PAIR_First) <= int(RegNum)) &&
+                (unsigned(RegNum) <= Reg_I64PAIR_Last));
+  return IsGPR;
 }
 
 static inline FPRRegister getEncodedFPR(RegNumT RegNum) {
   assert(int(Reg_FPR_First) <= int(RegNum));
   assert(unsigned(RegNum) <= Reg_FPR_Last);
   return FPRRegister(RegNum - Reg_FPR_First);
 }
 
 static inline bool isFPRReg(RegNumT RegNum) {
   return (int(Reg_FPR_First) <= int(RegNum)) &&
@@ skipping 30 matching lines @@
 
 } // end of namespace RegMIPS32
 
 // Extend enum RegClass with MIPS32-specific register classes (if any).
 enum RegClassMIPS32 : uint8_t { RCMIPS32_NUM = RC_Target };
 
 } // end of namespace MIPS32
 } // end of namespace Ice
 
 #endif // SUBZERO_SRC_ICEREGISTERSMIPS32_H