[SubZero] Implement GP to/from FP moves for MIPS

src/IceInstMIPS32.cpp

 //===- subzero/src/IceInstMips32.cpp - Mips32 instruction implementation --===//
 //
 //                        The Subzero Code Generator
 //
 // This file is distributed under the University of Illinois Open Source
 // License. See LICENSE.TXT for details.
 //
 //===----------------------------------------------------------------------===//
 //
 /// \file
@@ skipping 695 matching lines @@
   auto *SrcV = llvm::dyn_cast<Variable>(Src);
 
   assert(!llvm::isa<Constant>(Src));
 
   const char *ActualOpcode = nullptr;
   const bool DestIsReg = Dest->hasReg();
   const bool SrcIsReg = (SrcV && SrcV->hasReg());
 
   // reg to reg
   if (DestIsReg && SrcIsReg) {
-    switch (Dest->getType()) {
-    case IceType_f32:
-      ActualOpcode = "mov.s";
-      break;
-    case IceType_f64:
-      ActualOpcode = "mov.d";
-      break;
-    case IceType_i1:
-    case IceType_i8:
-    case IceType_i16:
-    case IceType_i32:
-      Str << "\t"
-          << "move"
-          << "\t";
-      getDest()->emit(Func);
-      Str << ", ";
-      getSrc(0)->emit(Func);
-      return;
-    default:
-      UnimplementedError(getFlags());
-      return;
+    const Type DstType = Dest->getType();
+    const Type SrcType = Src->getType();
+
+    // move GP to/from FP
+    if (DstType != SrcType) {
+      if (isScalarFloatingType(DstType)) {
+        Str << "\t"
+               "mtc1"
+               "\t";
+        getSrc(0)->emit(Func);
+        Str << ", ";
+        getDest()->emit(Func);
+        return;
+      }
+      ActualOpcode = "mfc1";
+    } else {
+      switch (Dest->getType()) {
+      case IceType_f32:
+        ActualOpcode = "mov.s";
+        break;
+      case IceType_f64:
+        ActualOpcode = "mov.d";
+        break;
+      case IceType_i1:
+      case IceType_i8:
+      case IceType_i16:
+      case IceType_i32:
+        ActualOpcode = "move";
+        break;
+      default:
+        UnimplementedError(getFlags());
+        return;
+      }
     }
 
     assert(ActualOpcode);
     Str << "\t" << ActualOpcode << "\t";
     getDest()->emit(Func);
     Str << ", ";
     getSrc(0)->emit(Func);
     return;
   }
 
@@ skipping 86 matching lines @@
 template <> void InstMIPS32Lw::emitIAS(const Cfg *Func) const {
   auto *Asm = Func->getAssembler<MIPS32::AssemblerMIPS32>();
   auto *Mem = llvm::dyn_cast<OperandMIPS32Mem>(getSrc(0));
   ConstantInteger32 *Offset = llvm::cast<ConstantInteger32>(Mem->getOffset());
   uint32_t Imm = static_cast<uint32_t>(Offset->getValue());
   Asm->lw(getDest(), Mem->getBase(), Imm);
 }
 
 } // end of namespace MIPS32
 } // end of namespace Ice