[turbofan] ARM: Implement vswp and use in gap resolver

test/cctest/test-assembler-arm.cc

 // Copyright 2012 the V8 project authors. All rights reserved.
 // Redistribution and use in source and binary forms, with or without
 // modification, are permitted provided that the following conditions are
 // met:
 //
 //     * Redistributions of source code must retain the above copyright
 //       notice, this list of conditions and the following disclaimer.
 //     * Redistributions in binary form must reproduce the above
 //       copyright notice, this list of conditions and the following
 //       disclaimer in the documentation and/or other materials provided
@@ skipping 2871 matching lines @@
   }
   {
     uint64_t strh = 0;
     uint64_t str = 0;
     dummy = CALL_GENERATED_CODE(isolate, f, &strh, &str, 3, 0xfedcba98, 0);
     CHECK_EQ(UINT64_C(0x000000ba98000000), strh);
     CHECK_EQ(UINT64_C(0x00fedcba98000000), str);
   }
 }
 
+TEST(vswp) {
+  CcTest::InitializeVM();
+  Isolate* isolate = CcTest::i_isolate();
+  HandleScope scope(isolate);
+  Assembler assm(isolate, NULL, 0);
+
+  typedef struct {
+    double result0;
+    double result1;
+    double result2;
+    double result3;
+  } T;
+  T t;
+
+  __ vmov(d0, 1.0);
+  __ vmov(d1, -1.0);
+  __ vswp(d0, d1);
+  __ vstr(d0, r0, offsetof(T, result0));
+  __ vstr(d1, r0, offsetof(T, result1));
+
+  if (CpuFeatures::IsSupported(VFP32DREGS)) {
+    __ vmov(d30, 1.0);
+    __ vmov(d31, -1.0);
+    __ vswp(d30, d31);
+    __ vstr(d30, r0, offsetof(T, result2));
+    __ vstr(d31, r0, offsetof(T, result3));
+  }
+
+  __ bx(lr);
+
+  CodeDesc desc;
+  assm.GetCode(&desc);
+  Handle<Code> code = isolate->factory()->NewCode(
+      desc, Code::ComputeFlags(Code::STUB), Handle<Code>());
+#ifdef DEBUG
+  OFStream os(stdout);
+  code->Print(os);
+#endif
+  F3 f = FUNCTION_CAST<F3>(code->entry());
+  Object* dummy = CALL_GENERATED_CODE(isolate, f, &t, 0, 0, 0, 0);
+  USE(dummy);
+  CHECK_EQ(-1.0, t.result0);
+  CHECK_EQ(1.0, t.result1);
+  if (CpuFeatures::IsSupported(VFP32DREGS)) {
+    CHECK_EQ(-1.0, t.result2);
+    CHECK_EQ(1.0, t.result3);
+  }
+}
+
 TEST(regress4292_b) {
   CcTest::InitializeVM();
   Isolate* isolate = CcTest::i_isolate();
   HandleScope scope(isolate);
 
   Assembler assm(isolate, NULL, 0);
   Label end;
   __ mov(r0, Operand(isolate->factory()->infinity_value()));
   for (int i = 0; i < 1020; ++i) {
     __ b(hi, &end);
@@ skipping 38 matching lines @@
   HandleScope scope(isolate);
 
   Assembler assm(isolate, NULL, 0);
   __ mov(r0, Operand(isolate->factory()->infinity_value()));
   __ BlockConstPoolFor(1019);
   for (int i = 0; i < 1019; ++i) __ nop();
   __ vldr(d0, MemOperand(r0, 0));
 }
 
 #undef __